2 A, Low V , Low Noise,
IN
CMOS Linear Regulator
Data Sheet
ADP1762
FEATURES TYPICAL APPLICATION CIRCUITS
2 A maximum output current ADP1762
V = 1.5V
V = 1.7V
IN OUT
VIN VOUT
Low input voltage supply range
C C
IN OUT
10F 10F
V = 1.10 V to 1.98 V, no external bias supply required
IN SENSE
R
ON
Fixed output voltage range: V = 0.9 V to 1.5 V PULL-UP
OUT_FIXED
100k EN
OFF
PG PG
Adjustable output voltage range: V = 0.5 V to 1.5 V
OUT_ADJ
SS
VADJ
Ultralow noise: 2 V rms, 100 Hz to 100 kHz
Noise spectral density C
SS VREG REFCAP
10nF
C
C REF
REG GND
4 nV/Hz at 10 kHz
1F
1F
3 nV/Hz at 100 kHz
Low dropout voltage: 62 mV typical at 2 A load Figure 1. Fixed Output Operation
Operating supply current: 4.5 mA typical at no load
ADP1762
V = 1.7V V = 1.5V
IN OUT
1.5% fixed output voltage accuracy over line, load, and
VIN VOUT
C C
IN OUT
temperature
10F 10F
SENSE
Excellent power supply rejection ratio (PSRR) performance
R
PULL-UP ON
100k
EN
62 dB typical at 10 kHz at 2 A load
OFF
PG PG
46 dB typical at 100 kHz at 2 A load
SS
VADJ
Excellent load/line transient response
C R
SS VREG REFCAP
ADJ
10nF
Soft start to reduce inrush current C 10k
C
REF
REG
GND
1F
1F
Optimized for small 10 F ceramic capacitors
Current-limit and thermal overload protection
Figure 2. Adjustable Output Operation
Power-good indicator
Table 1. Related Devices
Precision enable
Input Maximum Fixed/
16-lead, 3 mm 3 mm LFCSP package
Device Voltage Current Adjustable Package
APPLICATIONS
ADP1761 1.10 V to 1 A Fixed/adjustable 16-lead
1.98 V LFCSP
Regulation to noise sensitive applications such as radio
ADP1763 1.10 V to 3 A Fixed/adjustable 16-lead
frequency (RF) transceivers, analog-to-digital converter
1.98 V LFCSP
(ADC) and digital-to-analog converter (DAC) circuits,
ADP1740/ 1.6 V to 2 A Fixed/adjustable 16-lead
phase-locked loops (PLLs), voltage controlled oscillators
ADP1741 3.6 V LFCSP
(VCOs) and clocking integrated circuits
ADP1752/ 1.6 V to 0.8 A Fixed/adjustable 16-lead
Field-programmable gate array (FPGA) and digital signal
ADP1753 3.6 V LFCSP
processor (DSP) supplies
ADP1754/ 1.6 V to 1.2 A Fixed/adjustable 16-lead
Medical and healthcare
ADP1755 3.6 V LFCSP
Industrial and instrumentation
The ADP1762 is optimized for stable operation with small 10 F
GENERAL DESCRIPTION
ceramic output capacitors. The ADP1762 delivers optimal transient
performance with minimal board area.
The ADP1762 is a low noise, low dropout (LDO) linear regulator. It
is designed to operate from a single input supply with an input
The ADP1762 is available in fixed output voltages ranging from
voltage as low as 1.10 V, without the requirement of an external
0.9 V to 1.5 V. The output of the adjustable output model can be
bias supply, to increase efficiency and provide up to 2 A of
set from 0.5 V to 1.5 V through an external resistor connected
output current.
between VADJ and ground.
The low 62 mV typical dropout voltage at a 2 A load allows the
The ADP1762 has an externally programmable soft start time by
ADP1762 to operate with a small headroom while maintaining
connecting a capacitor to the SS pin. Short-circuit and thermal
regulation and providing better efficiency.
overload protection circuits prevent damage in adverse conditions.
The ADP1762 is available in a small 16-lead LFCSP package for the
smallest footprint solution to meet a variety of applications.
Rev. A Document Feedback
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12922-001
12922-002ADP1762 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1 Soft Start Function ..................................................................... 11
Applications ....................................................................................... 1 Adjustable Output Voltage ........................................................ 12
General Description ......................................................................... 1 Enable Feature ............................................................................ 12
Typical Application Circuits ............................................................ 1 Power-Good (PG) Feature ........................................................ 12
Revision History ............................................................................... 2 Applications Information .............................................................. 13
Specifications ..................................................................................... 3 Capacitor Selection .................................................................... 13
Input and Output Capacitor: Recommended Specifications . 4 Undervoltage Lockout ............................................................... 14
Absolute Maximum Ratings ............................................................ 5 Current-Limit and Thermal Overload Protection ................. 14
Thermal Data ................................................................................ 5 Thermal Considerations ............................................................ 14
Thermal Resistance ...................................................................... 5 PCB Layout Considerations ...................................................... 17
ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 18
Pin Configuration and Function Descriptions ............................. 6 Ordering Guide .......................................................................... 18
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 11
REVISION HISTORY
9/2016Rev. 0 to Rev. A
Changes to Figure 23 and Figure 24 ............................................. 11
4/2016Revision 0: Initial Version
Rev. A | Page 2 of 18