4 A, Low V , Low Noise, IN CMOS Linear Regulator Data Sheet ADP1764 FEATURES TYPICAL APPLICATION CIRCUITS 4 A maximum output current ADP1764 V = 1.5V V = 1.8V IN OUT VIN VOUT Low input voltage supply range C C IN OUT 22F 22F V = 1.10 V to 1.98 V, no external bias supply required IN SENSE R ON PULL-UP Fixed output voltage range (V ): 0.55 V to 1.5 V OUT FIXED EN 100k OFF PG PG Adjustable output voltage range (V ): 0.5 V to 1.5 V OUT ADJ SS VADJ Ultralow noise: 2 V rms, 100 Hz to 100 kHz Noise spectral density: 5 nV/Hz at 10 kHz 4 nV/Hz at 100 kHz C SS VREG REFCAP 10nF C C REF REG GND Low dropout voltage: 47 mV typical at 4 A load 1F 1F Operating supply current: 5 mA typical at no load Figure 1. Fixed Output Operation 1.5% fixed output voltage accuracy over line, load, and temperature ADP1764 V = 1.8V V = 1.5V OUT IN Excellent power supply rejection ratio (PSRR) performance VIN VOUT C C IN OUT 69 dB typical at 10 kHz at 4 A load 22F 22F SENSE 46 dB typical at 100 kHz at 4 A load R ON PULL-UP EN 100k Excellent load/line transient response OFF PG PG Soft start to reduce inrush current SS VADJ Optimized for small 22 F ceramic capacitors R C ADJ SS VREG REFCAP 10k Current-limit and thermal overload protection 10nF C C GND REF REG 1F 1F Power-good indicator Precision enable Figure 2. Adjustable Output Operation 16-lead, 3 mm 3 mm LFCSP package The ADP1764 is available in fixed output voltages ranging from APPLICATIONS 0.55 V to 1.5 V. The output voltage (VOUT) of the adjustable output model can be set from 0.5 V to 1.5 V through an Regulation to noise sensitive applications such as radio external resistor connected between VADJ and ground. frequency (RF) transceivers, analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuits, The ADP1764 has an externally programmable soft start time by phase-locked loops (PLLs), voltage controlled oscillators connecting a capacitor to the SS pin. Short-circuit and thermal (VCOs) and clocking integrated circuits overload protection circuits prevent damage in adverse conditions. Field-programmable gate array (FPGA) and digital signal The ADP1764 is available in a small, 16-lead LFCSP package for processor (DSP) supplies the smallest footprint solution to meet a variety of applications. Medical and healthcare Table 1. Related Devices Industrial and instrumentation Input Maximum Fixed/ GENERAL DESCRIPTION Model Voltage Current Adjustable Package ADP1761 1.10 V to 1.98 V 1 A Fixed/ 16-lead The ADP1764 is a low noise, low dropout (LDO) linear adjustable LFCSP regulator. It is designed to operate from a single input supply ADP1762 1.10 V to 1.98 V 2 A Fixed/ 16-lead with an input voltage as low as 1.10 V without the requirement adjustable LFCSP of an external bias supply to increase efficiency and provide up ADP1763 1.10 V to 1.98 V 3 A Fixed/ 16-lead to 4 A of output current (I ). adjustable LFCSP OUT ADP1740/ 1.6 V to 3.6 V 2 A Fixed/ 16-lead The low 47 mV typical dropout voltage at a 4 A load allows the ADP1741 adjustable LFCSP ADP1764 to operate with a small headroom while maintaining ADP1752/ 1.6 V to 3.6 V 0.8 A Fixed/ 16-lead regulation and providing better efficiency. ADP1753 adjustable LFCSP ADP1754/ 1.6 V to 3.6 V 1.2 A Fixed/ 16-lead The ADP1764 is optimized for stable operation with small 22 F ADP1755 adjustable LFCSP ceramic output capacitors. The ADP1764 delivers optimal transient performance with minimal printed circuit board (PCB) area. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 14939-001 14939-002ADP1764 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Soft Start Function ..................................................................... 13 Applications ....................................................................................... 1 Adjustable Output Voltage ........................................................ 14 General Description ......................................................................... 1 Enable Feature ............................................................................ 14 Typical Application Circuits ............................................................ 1 Power-Good (PG) Feature ........................................................ 14 Revision History ............................................................................... 2 Applications Information .............................................................. 15 Specif icat ions ..................................................................................... 3 Capacitor Selection .................................................................... 15 Input and Output Capacitor: Recommended Specifications.. 4 Undervoltage Lockout ............................................................... 16 Absolute Maximum Ratings ............................................................ 5 Current-Limit and Thermal Overload Protection ................. 16 Thermal Data ................................................................................ 5 Paralleling ADP1764 Devices for High Current Applications ................................................................................ 16 Thermal Resistance/Parameter ................................................... 5 Thermal Considerations ............................................................ 17 ESD Caution .................................................................................. 5 PCB Layout Considerations ...................................................... 19 Pin Configuration and Function Descriptions ............................. 6 Outline Dimensions ....................................................................... 20 Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 20 Theory of Operation ...................................................................... 13 REVISION HISTORY 6/2017Rev. 0 to Rev. A Changes to Thermal Data and Table 5 ........................................... 5 Changed Thermal Resistance Section to Thermal Resistance/Parameter Section ......................................................... 5 Changes to Typical Performance Characteristics Section ........... 7 Changes to Table 7, Figure 50 through Figure 52, and Figure 50 Caption through Figure 52 Caption ............................................. 17 Changes to Figure 53 though Figure 55 and Figure 53 Caption through Figure 55 Caption ............................................................ 18 1/2017Revision 0: Initial Version Rev. A Page 2 of 20