Synchronous, Step-Down DC-to-DC Controller with Voltage Tracking and Synchronization Data Sheet ADP1853 current, improve EMI, and reduce the size of the input bulk FEATURES capacitance. The ADP1853 can also be configured as a slave Input voltage range: 2.75 V to 20 V device for current sharing. Additionally, the ADP1853 includes Output voltage range: 0.6 V to 90% V IN accurate tracking, precision enable, and power good functions Maximum output current of more than 25 A for sequencing. The ADP1853 provides a high speed, high peak Current mode architecture with current sense input current gate driving capability to enable energy efficient power Configurable to voltage mode conversion. The device can be configured to operate in power 1% output voltage accuracy over temperature saving mode by skipping pulses, reducing switching losses and Voltage tracking input improving efficiency at light load and standby conditions. Programmable frequency: 200 kHz to 1.5 MHz Synchronization input The accurate current limit allows design within a narrower Internal clock output range of tolerances and can reduce overall converter size and Power saving mode at light load cost. The ADP1853 can regulate down to 0.6 V output using a Precision enable input high accuracy reference with 1% tolerance over the Power good with internal pull-up resistor temperature range from 40C to 125C. Adjustable soft start With a wide range input voltage, the ADP1853 is designed to Programmable current sense gain provide the designer with maximum flexibility for use in a Integrated bootstrap diode variety of system configurations loop compensation, soft start, Starts into a precharged load frequency setting, power saving mode, current limit, and Externally adjustable slope compensation current sense gain can all be programmed using external Suitable for any output capacitor components. In addition, the external RAMP resistor allows Overvoltage and overcurrent-limit protection choosing optimal slope and V feedforward in both current IN Thermal overload protection and voltage mode for excellent line rejection. The linear Input undervoltage lockout (UVLO) regulator and the boot strap diode for the high-side driver are Available in 20-lead, 4 mm 4 mm LFCSP internal. Supported by ADIsimPower design tool Protection features include undervoltage lock out, overvoltage, APPLICATIONS overcurrent/short circuit, and overtemperature. Intermediate bus and POL systems requiring sequencing and VIN tracking, including R RAMP Telecom base station and networking V MA RAMP VIN Industrial and Instrumentation M1 EN L Medical and healthcare DH BST VOUT TRK GENERAL DESCRIPTION SW VCCO CS The ADP1853 is a wide range input, dc-to-dc, synchronous ILIM buck controller capable of running from commonly used 3.3 V M2 ADP1853 DL to 12 V (up to 20 V) voltage inputs. The device nominally R CSG SYNC operates in current mode with valley current sensing providing PGND HI the fastest step response for digital loads. It can also be FB FREQ LO configured as a voltage mode controller with low noise and SS COMP crosstalk for sensitive loads. PGOOD AGND CLKOUT The ADP1853 can be used as a master synchronization clock for the power system and for convenient synchronization Figure 1. Typical Operation Circuit between controllers. The CLKOUT signal can synchronize other devices in the ADP185x family such that slave devices are phase-shifted from the master to reduce the input ripple Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20122017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 10594-001ADP1853 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Thermal Overload Protection .................................................. 16 Applications ....................................................................................... 1 Interleaved Dual-Phase Operation .......................................... 16 General Description ......................................................................... 1 Applications Information .............................................................. 17 Revision History ............................................................................... 2 ADIsimPower Design Tool ....................................................... 17 Specif icat ions ..................................................................................... 3 Setting the Output Voltage ........................................................ 17 Absolute Maximum Ratings ............................................................ 6 Soft Start ...................................................................................... 17 ESD Caution .................................................................................. 6 Setting the Current Limit .......................................................... 17 Simplified Block Diagram ............................................................... 7 Accurate Current-Limit Sensing .............................................. 17 Pin Configuration and Function Descriptions ............................. 8 Input Capacitor Selection .......................................................... 17 Typical Performance Characteristics ........................................... 10 VIN Pin Filter ............................................................................. 18 Theory of Operation ...................................................................... 12 Boost Capacitor Selection ......................................................... 18 Control Architecture .................................................................. 12 Inductor Selection ...................................................................... 18 Oscillator Frequency .................................................................. 12 Output Capacitor Selection ....................................................... 18 Synchronization .......................................................................... 13 MOSFET Selection ..................................................................... 19 PWM or Pulse Skip Mode of Operation ................................. 13 Loop CompensationVoltage Mode ...................................... 20 CLKOUT Signal .......................................................................... 13 Loop CompensationCurrent Mode ..................................... 21 Synchronous Rectifier and Dead Time ................................... 14 Switching Noise and Overshoot Reduction ............................ 23 Input Undervoltage Lockout ..................................................... 14 Voltage Tracking ......................................................................... 23 Internal Linear Regulator .......................................................... 14 PCB Layout Guidlines ............................................................... 24 Overvolage Protection ............................................................... 14 Typical Operating Circuits ............................................................ 25 Power Good ................................................................................. 14 Outline Dimensions ....................................................................... 27 Short-Circuit and Current-Limit Protection .......................... 15 Ordering Guide .......................................................................... 27 Enable/Disable Control ............................................................. 15 REVISION HISTORY 2/2017Rev. 0 to Rev. A Updated Outline Dimensions ....................................................... 27 Changes to Ordering Guide .......................................................... 27 5/2012Revision 0: Initial Version Rev. A Page 2 of 28