Dual 1 A, 18 V, Synchronous Step-Down Regulator with Fail-Safe Voltage Monitoring Data Sheet ADP2311 FEATURES TYPICAL APPLICATION CIRCUIT Input voltage: 4.5 V to 18 V PFO POR WDI RSTO 1.0% output accuracy V EN IN PVIN1 PVIN2 V IN Integrated MOSFET: 110 m/ 60 m typical R R PFI TOP VM2 TOP C IN1 PFI VM2 C IN2 Continuous output current: 1 A/1 A R R PFI BOT VM2 BOT Power fail comparator generates warning BST1 ADP2311 BST2 C1 C2 BST BST Power-on reset with programmable delay timer L2 V V L1 OUT2 OUT1 Adjustable voltage monitor for power-down (Channel 2) SW1 SW2 C PGND1 PGND2 R OUT2 Watchdog refresh input C R TOP1 TOP2 OUT1 FB1 FB2 Dual phase with 180 out-of-phase operation R R BOT1 TIMER GND VREG BOT2 Fixed switching frequency: 300 kHz C C VREG TIMER Internal compensation and soft start Stable with low ESR output ceramic capacitors Figure 1. Precision enable input 100 V = 3.3V OUT Power feedback during power-off V = 5V 95 OUT UVLO, OCP, OVP, and thermal shutdown protection 90 APPLICATIONS 85 Industrial and instrumentation 80 Healthcare and medical 75 DC-to-DC point of load applications 70 65 60 55 50 0 0.2 0.4 0.6 0.8 1.0 OUTPUT CURRENT (A) Figure 2. Efficiency vs. Output Current at VIN = 12 V, fSW = 300 kHz GENERAL DESCRIPTION An on-chip watchdog timer can reset the microprocessor if it The ADP2311 is a fully integrated, dual output, synchronous fails to strobe within a preset timeout period. Accurate voltage step-down dc-to-dc regulator. The regulator operates from input voltages of 4.5 V to 18 V, and the output can regulate down to monitoring circuitry and a power fail comparator provide a 0.6 V. Each channel can provide up to 1 A of continuous output controlled power-up and power-down sequence to enhance current. system reliability. The ADP2311 also includes undervoltage lockout (UVLO), The ADP2311 integrates the high-side and low-side MOSFETs overvoltage protection (OVP), overcurrent protection (OCP), to provide a very high efficiency, compact solution. Both channels and thermal shutdown (TSD). of the regulator run at 180 out of phase to reduce the input ripple current and the input capacitor size, thereby helping to lower The ADP2311 operates over the 40C to +125C junction system electromagnetic interference (EMI). The ADP2311 also temperature range and is available in a 24-lead LFCSP package. integrates internal compensation and soft start circuitry to simplify the design. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20142017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com EFFICIENCY (%) 11036-002 11036-001ADP2311 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Peak Current-Limit and Short-Circuit Protection ................ 13 Applications ....................................................................................... 1 Power-On Reset (POR) ............................................................. 13 Typical Application Circuit ............................................................. 1 TIMER Pin Configuration ........................................................ 14 General Description ......................................................................... 1 Power Fail Comparator .............................................................. 15 Revision History ............................................................................... 2 Voltage Monitor Comparator (VM2) ...................................... 15 Functional Block Diagram .............................................................. 3 Watchdog Timer ......................................................................... 15 Specifications ..................................................................................... 4 Power-Up and Power-Down Sequence ................................... 15 Absolute Maximum Ratings ............................................................ 6 Overvoltage Protection (OVP) ................................................. 15 Thermal Resistance ...................................................................... 6 Undervoltage Lockout (UVLO) ............................................... 15 ESD Caution .................................................................................. 6 Thermal Shutdown .................................................................... 16 Pin Configuration and Function Descriptions ............................. 7 Applications Information .............................................................. 17 Typical Performance Characteristics ............................................. 8 Input Capacitor Selection .......................................................... 17 Theory of Operation ...................................................................... 13 Output Voltage Setting .............................................................. 17 Control Scheme .......................................................................... 13 Inductor Selection ...................................................................... 17 Precision Enable/Shutdown ...................................................... 13 Output Capacitor Selection....................................................... 18 Internal Regulator (VREG) ....................................................... 13 Application Circuit ......................................................................... 19 Bootstrap Circuitry .................................................................... 13 Outline Dimensions ....................................................................... 20 Soft Start ...................................................................................... 13 Ordering Guide .......................................................................... 20 REVISION HISTORY 8/2017Rev. A to Rev. B Updated Outline Dimensions ....................................................... 20 Changes to Ordering Guide .......................................................... 20 3/2014Revision A: Initial Version Rev. B Page 2 of 20