TFT LCD Panel Power Module ADP3041 FEATURES FUNCTIONAL BLOCK DIAGRAM 600 kHz PWM Frequency COMP IN Fully Integrated 1.5 A Power Switch 3% Output Regulation Accuracy ERROR ADP3041 AMP Simple Compensation REF g BIAS m Small Inductor and MLC Capacitors FB 300 A Quiescent Supply Current SW 90% Efficiency F/F Undervoltage Lockout R Q RAMP 5 Buffers GEN S DRIVER COMPARATOR TSSOP 20-Lead Package Pb-Free Part NC OSC APPLICATIONS SD TFT LCD Bias Supplies CURRENT SENSE SOFT START SS AMPLIFIER GENERAL DESCRIPTION PGND The ADP3041 is a fixed frequency, PWM step-up dc-to-dc AVCC switching regulator with five buffers capable of 12 V boosted VCMI VCMO output voltage in a TSSOP 20-lead package. It provides high efficiency, low noise operation, and excellent dynamic response, and is easy to use. The high switching frequency allows for small, G1I G1O cost-saving, external inductive and capacitive components. The ADP3041 operates in PWM current mode. The current limit and the power switch are integrated completely on-chip. G2I G2O Capable of operating from 2.5 V to 5.5 V input, the ADP3041 is ideal for thin-film transistor (TFT) liquid crystal display (LCD) module applications, where local point-of-use power G3I G3O regulation is required. Supporting output voltages down to 4.5 V, the ADP3041 is ideal to generate todays low voltage rails, pro- viding the optimal solution in its class for delivering power G4I G4O efficiently, responsively, and simply with minimal printed circuit board area. The ADP3041 integrates five buffers. Each buffer can deliver 35 mA output current and has rail-to-rail input and output AGND capability. REV. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com under any patent or patent rights of Analog Devices. Trademarks and Fax: 781/326-8703 2003 Analog Devices, Inc. All rights reserved. registered trademarks are the property of their respective owners.1 (V = 3.3 V, T = 40 C to +85 C, unless otherwise noted.) ADP3041SPECIFICATIONS IN A Parameter Symbol Conditions Min Typ Max Unit SUPPLY Input Voltage V 2.5 3.3 5.5 V IN 2 Operating Current I f = 600 kHz, No Load, 1 5 mA QSW AVCC = Open Quiescent Current I Not Switching, AVCC = Open 270 500 A Q Shutdown Current I AVCC = Open 10 A SD ERROR AMPLIFIER Feedback Voltage Accuracy V 1.215 1.233 1.251 V FB Line Regulation V = 2.5 V to 5.5 V 0.15 +0.15 %/V IN FB Bias Current 100 nA Overall Regulation Line, Temperature 3 +3 % OUTPUT SWITCH On Resistance R At 1.5 A, V = 3.3 V 300 m DS (ON) IN Output Load Current I Continuous Operation, LOAD = 3.3 V, V = 10 V 300 mA V IN OUT Leakage Current V = 12 V, SD = 0 V 5 A SWITCH Efficiency I = 200 mA, V = 10 V 90 % LOAD OUT I = 100 mA, V = 10 V 90 % LOAD OUT OSCILLATOR Oscillator Frequency f 0.4 0.6 0.9 MHz OSC Maximum Duty Cycle D COMP = Open, FB = 1 V 80 90 % MAX Minimum Duty Cycle D COMP = Open, FB = 1 V 40 % MIN SOFT START Charge Current V = 3.3 V, C = 1 nF 2.5 A SS SS SHUTDOWN Input Voltage Low 0.8 V Input Voltage High 2.2 V CURRENT LIMIT Peak Switch Current I 1.5 1.8 A CL COMPENSATION Transconductance g 100 A/V m Gain A 1000 V/V V UNDERVOLTAGE LOCKOUT UVLO Threshold 2.2 2.4 2.5 V UVLO Hysteresis 130 mV OUTPUT Voltage Range V V = 2.5 V to 5.5 V 4.5 12 V OUT IN Load Regulation I = 10 mA to 150 mA, LOAD V = 10 V 0.05 mV/mA OUT 2 REV. D