Low Noise Micro PMU, 3 A Buck Regulator with 3 A LDO Data Sheet ADP5003 FEATURES FUNCTIONAL BLOCK DIAGRAM V : PVIN1 Low noise, dc power supply system 4.2V TO 15V PVIN1 High efficiency buck for first stage conversion PVIN1 C EN1 PVIN1 High PSRR, low noise LDO regulator to remove switching VOUT1 V : SW1 COMP1 PVOUT1 ripple BUCK L1 0.6V TO 5.0V SW1 REGULATOR R C Adaptive LDO regulator headroom control option for C C 3A SW1 C PVOUT1 optimal efficiency and PSRR across full load range R BOT1 VSET1 PGND1 PGND1 3 A, low noise, buck regulator R TOP1 PGND1 Wide input voltage range: 4.2 V to 15 V VREG Programmable output voltage range: 0.6 V to 5.0 V R RT C RT VREG V : PVINSYS 0.3 MHz to 2.5 MHz internal oscillator PVINSYS 4.2V TO 15V PWRGD SYSTEM 0.3 MHz to 2.5 MHz SYNC frequency range C PVINSYS 3 A, low noise, NFET LDO regulator (active filter) SYNC REFOUT Wide input voltage range: 0.65 V to 5 V C REFOUT Programmable output voltage range: 0.6 V to 3.3 V Differential point of load remote sensing PVIN2 C PVIN2 PVIN2 3 V rms output noise (independent of output voltage) VSET2 PVIN2 PSRR > 50 dB (to 100 kHz) with 400 mV headroom at 3 A VBUF V : PVOUT2 PVOUT2 LOW NOISE Ultrafast transient response 0.6V TO 3.3V C LDO ACTIVE PVOUT2 VBUF FILTER PVOUT2 Power-good output 3A C VREG LDO PVOUT2 LOAD Precision enable inputs for both the buck regulator and LDO C VREG LDO VFB2P 40C to +125C operating junction temperature range EN2 VFB2N 32-lead, 5 mm 5 mm, LFCSP APPLICATIONS AGND1 AGND2 Low noise power for high speed analog-to-digital converter Figure 1. (ADC) and digital-to-analog converter (DAC) designs Powering RF transceivers and clocking ICs GENERAL DESCRIPTION The ADP5003 integrates a high voltage buck regulator and an programmed using resistor dividers. ultralow noise low dropout (LDO) regulator in a small, 5 mm The LDO regulator output can be accurately controlled at the 5 mm, 32-lead LFCSP package to provide highly efficient and point of load (POL) using remote sensing that compensates for the quiet regulated supplies. printed circuit board (PCB) trace impedance while delivering The buck regulator is optimized to operate at high output high output currents. currents up to 3 A. The LDO is capable of a maximum output Each regulator is activated via a dedicated precision enable current of 3 A and operates efficiently with low headroom input. The buck switching frequency can be synchronized to voltage while maintaining high power supply rejection. an external signal, or programmed with an external resistor. The ADP5003 can operate in one of two modes. Adaptive mode Safety features in the ADP5003 include thermal shutdown (TSD), allows the LDO to operate with an optimized headroom by input undervoltage lockout (UVLO) and independent current adjusting the buck output voltage internally in response to the limits for each regulator. The ADP5003 is rated for a 40C to LDO load current. Alternatively, the ADP5003 can operate in +125C operating junction temperature range. independent mode, where both regulators operate separately from each other, and where the output voltages are Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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Technical Support www.analog.com 15021-001ADP5003 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Setting the Switching Frequency for the Buck Regulator ....... 22 Applications ....................................................................................... 1 Setting the Output Voltage for the Buck Regulator ................. 22 Functional Block Diagram .............................................................. 1 Selecting the Inductor for the Buck Regulator ......................... 22 General Description ......................................................................... 1 Selecting the Output Capacitor for the Buck Regulator.......... 22 Revision History ............................................................................... 3 Designing the Compensation Network for the Buck Regulator ....................................................................................................... 23 Specifications ..................................................................................... 4 Selecting the Input Capacitor for the Buck Regulator ............. 23 Buck Regulator Specifications .................................................... 5 Adaptive Headroom Control Design Example .......................... 24 LDO Specifications ...................................................................... 6 Setting the Switching Frequency for the Buck Regulator Using Adaptive Headroom Controller Specifications ........................ 6 Adaptive Headroom Control .................................................... 24 Absolute Maximum Ratings ............................................................ 7 Setting the Output Voltage for the LDO Regulator Using Thermal Resistance ...................................................................... 7 Adaptive Headroom Control .................................................... 24 ESD Caution .................................................................................. 7 Selecting the Inductor for the Buck Regulator Using Adaptive Pin Configuration and Function Descriptions ............................. 8 Headroom Control ..................................................................... 24 Typical Performance Characteristics ............................................. 9 Selecting the Output Capacitors for the Buck Regulator Using Adaptive Headroom Control .................................................... 24 Theory of Operation ...................................................................... 15 Designing the Compensation Network for the Buck Power Management Unit ........................................................... 15 Regulator Using Adaptive Headroom Control ....................... 25 Buck Regulator ............................................................................ 15 Selecting the Input Capacitor for the Buck Regulator Using LDO Regulator ............................................................................ 17 Adaptive Headroom Control .................................................... 25 Power-Good ................................................................................ 18 Recommended External Components for the Buck Regulator Output Voltage of the Buck Regulator ..................................... 18 ....................................................................................................... 26 Output Voltage of the LDO Regulator ..................................... 18 Buck Configurations ...................................................................... 28 Voltage Conversion Limitations ............................................... 18 Independent ................................................................................ 28 Component Selection................................................................. 19 Adaptive Headroom ................................................................... 29 Compensation Components Design ........................................ 21 Layout Considerations ................................................................... 30 Junction Temperature ................................................................ 21 Outline Dimensions ....................................................................... 31 Buck Regulator Design Example .................................................. 22 Ordering Guide .......................................................................... 31 Rev. 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