Micro PMU with 1.2 A Buck, Two 300 mA LDOs, Supervisory, Watchdog, and Manual Reset Data Sheet ADP5041 FEATURES FUNCTIONAL BLOCK DIAGRAM VOUT1 Input voltage range: 2.3 V to 5.5 V R = 30 FILT AVIN L1 1H One 1.2 A buck regulator SW V AT OUT1 1.2A FB1 BUCK R1 C6 Two 300 mA LDOs VBIAS 10F R2 VIN1 V = 2.3V TO IN1 20-lead, 4 mm 4 mm LFCSP package 5.5V PGND C1 4.7F EN BK ON Overcurrent and thermal protection FPWM MODE EN1 OFF PSM/PWM Soft start VOUT2 V AT LDO1 OUT2 VIN2 V = 1.7V IN2 (DIGITAL) R3 300mA FB2 TO 5.5V Undervoltage lockout C2 C5 EN LDO1 1F R4 2.2F ON Open-drain processor reset with externally adjustable EN2 OFF nRSTO threshold monitoring VBIAS P WDI MR SUPERVISOR Guaranteed reset output valid to V = 1 V AVIN VTHR ON Manual reset input EN3 R5 R4 OFF Watchdog refresh input EN LDO2 VOUT3 VIN3 V AT V = 1.7V OUT3 Buck key specifications IN3 LDO2 300mA TO 5.5V (ANALOG) FB3 C3 C6 1F Output voltage range: 0.8 V to 3.8 V R7 2.2F R3 AGND Current mode topology for excellent transient response 3 MHz operating frequency Figure 1. Peak efficiency up to 96% Uses tiny multilayer inductors and capacitors Mode pin selects forced PWM or auto PWM/PSM mode 100% duty cycle low dropout mode LDOs key specifications Output voltage range: 0.8 V to 5.2 V Low input supply voltage from 1.7 V to 5.5 V Stable with 2.2 F ceramic output capacitors High PSRR Low output noise Low dropout voltage 40C to +125C junction temperature range GENERAL DESCRIPTION The ADP5041 combines one high performance buck regulator range of the ADP5041 LDOs extend the battery life of portable and two low dropout (LDO) regulators in a small 20-lead devices. The ADP5041 LDOs maintain a power supply rejection LFCSP to meet demanding performance and board space greater than 60 dB for frequencies as high as 10 kHz while requirements. operating with a low headroom voltage. Each regulator in the ADP5041 is activated by a high level on The high switching frequency of the buck regulator enables use of tiny multilayer external components and minimizes the respective enable pin. The output voltages of the regulators board space. and the reset threshold are programmed through external resistor dividers to address a variety of applications. The ADP5041 When the MODE pin is set to logic high, the buck regulator contains supervisory circuits that monitor power supply voltage operates in forced PWM mode. When the MODE pin is set to levels and code execution integrity in microprocessor-based logic low, the buck regulator operates in PWM mode when the systems. They also provide power-on reset signals. An on-chip load is around the nominal value. When the load current falls watchdog timer can reset the microprocessor if it fails to strobe below a predefined threshold, the regulator operates in power within a preset timeout period. save mode (PSM), improving the light load efficiency. The low quiescent current, low dropout voltage, and wide input voltage Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20112019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 09652-001ADP5041 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Buck Section ................................................................................ 27 Functional Block Diagram .............................................................. 1 LDO Section ............................................................................... 28 General Description ......................................................................... 1 Supervisory Section ................................................................... 28 Revision History ............................................................................... 2 Applications Information .............................................................. 31 Specif icat ions ..................................................................................... 3 Buck External Component Selection ....................................... 31 General Specifications ................................................................. 3 LDO External Component Selection ...................................... 32 Supervisory Specifications .......................................................... 3 Output Capacitor ........................................................................ 32 Buck Specifications ....................................................................... 4 Supervisory Section ................................................................... 33 LDO1, LDO2 Specifications ....................................................... 5 Power Dissipation/Thermal Considerations ............................. 34 Input and Output Capacitor, Recommended Specifications .. 6 Application Diagram ................................................................. 36 Absolute Maximum Ratings ............................................................ 7 PCB Layout Guidelines .................................................................. 37 Thermal Resistance ...................................................................... 7 Suggested Layout ........................................................................ 37 ESD Caution .................................................................................. 7 Bill of Materials ........................................................................... 38 Pin Configuration and Function Descriptions ............................. 8 Factory Programmable Options ................................................... 39 Typical Performance Characteristics ............................................. 9 Outline Dimensions ....................................................................... 40 Theory of Operation ...................................................................... 26 Ordering Guide .......................................................................... 40 Power Management Unit ........................................................... 26 REVISION HISTORY 5/2019Rev. A to Rev. B Changes to Figure 109 .................................................................... 32 4/2018Rev. 0 to Rev. A Updated Outline Dimensions ....................................................... 40 Changes to Ordering Guide .......................................................... 40 12/2011Revision 0: Initial Version Rev. B Page 2 of 40