Integrated Power Solution with Quad Buck Regulators and Supervisory Circuits Data Sheet ADP5053 FEATURES TYPICAL APPLICATION CIRCUIT ADP5053 Wide input voltage range: 4.5 V to 15.0 V SYNC/MODE VREG INT VREG 1.5% output accuracy over full temperature range VDD OSCILLATOR RT C1 100mA C0 250 kHz to 1.4 MHz adjustable switching frequency FB1 PVIN1 4.5V TO 15V BST1 Adjustable/fixed output options via factory fuse SW1 C3 CHANNEL 1 L1 C2 VOUT1 Power regulation COMP1 BUCK REGULATOR (1.2A/2.5A/4A) VREG C4 Channel 1 and Channel 2: programmable 1.2 A/2.5 A/4 A EN1 Q1 DL1 sync buck regulators with low-side FET driver SS12 R ILIM1 PGND Channel 3 and Channel 4: 1.2 A sync buck regulators R ILIM2 DL2 Single 8 A output (Channel 1 and Channel 2 operated in parallel) Q2 PVIN2 C5 CHANNEL 2 VREG VOUT2 SW2 Precision enable with 0.8 V accurate threshold BUCK REGULATOR COMP2 L2 (1.2A/2.5A/4A) C6 C7 BST2 Active output discharge switch EN2 FB2 FPWM or automatic PWM/PSM selection PWRGD Frequency synchronization input or output PVIN3 BST3 C9 L3 C8 VOUT3 Optional latch-off protection on OVP/OCP failure SW3 COMP3 CHANNEL 3 BUCK REGULATOR C10 FB3 Power-good flag on selected channels (1.2A) EN3 PGND3 UVLO, OCP, and TSD protection SS34 Open-drain processor reset with external adjustable BST4 PVIN4 C12 L4 VOUT4 threshold monitoring SW4 CHANNEL 4 C11 BUCK REGULATOR COMP4 FB4 C13 Watchdog refresh input (1.2A) EN4 VREG PGND4 Manual reset input RSTO WDI WATCHDOG APPLICATIONS MR VTH AND RESET VOUTx Small cell base stations FPGA and processor applications EXPOSED PAD Security and surveillance Figure 1. Medical applications GENERAL DESCRIPTION The ADP5053 combines four high performance buck regulators, a The switching frequency of the ADP5053 can be programmed supervisory circuit, a watchdog timer, and a manual reset in a or synchronized to an external clock. The ADP5053 contains a 48-lead LFCSP package that meets demanding performance and precision enable pin on each channel for easy power-up sequencing board space requirements. The device enables direct connection or adjustable UVLO threshold. to high input voltages up to 15.0 V with no preregulators. The ADP5053 contains supervisory circuits that monitor the Channel 1 and Channel 2 integrate high-side power MOSFET and voltage level. The watchdog timer can generate a reset if the low-side MOSFET drivers. External NFETs can be used in low-side WDI pin is not toggled within a preset timeout period. Processor reset mode or system power on/off switch mode can be selected power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. for manual reset functionality. Combining Channel 1 and Channel 2 in a parallel configuration Table 1. Family Models can provide a single output with up to 8 A of current. 2 Model Channels I C Package Channel 3 and Channel 4 integrate both high-side and low-side ADP5050 Four bucks, one LDO Yes 48-Lead LFCSP MOSFETs to deliver an output current of 1.2 A. ADP5051 Four bucks, supervisory Yes 48-Lead LFCSP ADP5052 Four bucks, one LDO No 48-Lead LFCSP ADP5053 Four bucks, supervisory No 48-Lead LFCSP ADP5054 Four high current bucks No 48-Lead LFCSP Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20132017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 11636-001ADP5053 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Power-Good Function ............................................................... 22 Applications ....................................................................................... 1 Thermal Shutdown .................................................................... 22 Typical Application Circuit ............................................................. 1 Supervisory Circuit .................................................................... 22 General Description ......................................................................... 1 Applications Information .............................................................. 24 Revision History ............................................................................... 3 ADIsimPower Design Tool ....................................................... 24 Detailed Functional Block Diagram .............................................. 4 Programming the Adjustable Output Voltage ........................ 24 Specifications ..................................................................................... 5 Voltage Conversion Limitations ............................................... 24 Buck Regulator Specifications .................................................... 6 Current-Limit Setting ................................................................ 24 Supervisory Specifications .......................................................... 8 Soft Start Setting ......................................................................... 25 Absolute Maximum Ratings ............................................................ 9 Inductor Selection ...................................................................... 25 Thermal Resistance ...................................................................... 9 Output Capacitor Selection....................................................... 25 ESD Caution .................................................................................. 9 Input Capacitor Selection .......................................................... 26 Pin Configuration and Function Descriptions ........................... 10 Low-Side Power Device Selection ............................................ 26 Typical Performance Characteristics ........................................... 12 Programming the UVLO Input ................................................ 26 Theory of Operation ...................................................................... 17 Compensation Components Design ....................................... 27 Buck Regulator Operational Modes ......................................... 17 Power Dissipation....................................................................... 27 Adjustable and Fixed Output Voltages .................................... 17 Junction Temperature ................................................................ 28 Internal Regulators (VREG and VDD) ................................... 17 Design Example .............................................................................. 29 Separate Supply Applications .................................................... 18 Setting the Switching Frequency .............................................. 29 Low-Side Device Selection ........................................................ 18 Setting the Output Voltage ........................................................ 29 Bootstrap Circuitry .................................................................... 18 Setting the Current Limit .......................................................... 29 Active Output Discharge Switch .............................................. 18 Selecting the Inductor ................................................................ 29 Precision Enabling ...................................................................... 18 Selecting the Output Capacitor ................................................ 30 Oscillator ..................................................................................... 18 Selecting the Low-Side MOSFET ............................................. 30 Synchronization Input/Output ................................................. 19 Designing the Compensation Network ................................... 30 Soft Start ...................................................................................... 19 Selecting the Soft Start Time..................................................... 30 Parallel Operation....................................................................... 20 Selecting the Input Capacitor ................................................... 30 Startup with Precharged Output .............................................. 20 Recommended External Components .................................... 31 Current-Limit Protection .......................................................... 20 Circuit Board Layout Recommendations ................................... 32 Frequency Foldback ................................................................... 21 Typical Application Circuits ......................................................... 33 Hiccup Protection ...................................................................... 21 Factory Default Options ................................................................ 36 Latch-Off Protection .................................................................. 21 Outline Dimensions ....................................................................... 37 Undervoltage Lockout (UVLO) ............................................... 22 Ordering Guide .......................................................................... 37 Rev. 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