Triple Buck Regulator Integrated Power Solution Data Sheet ADP5056 FEATURES TYPICAL APPLICATION CIRCUIT Wide input voltage range: 2.75 V to 18 V RT VBIAS (V = 4.5V BIAS INT TO 18.0V) Bias input voltage range: 4.5 V to 18 V OSC VREG V REG SYNC/MODE Operation up to 150C junction temperature C1 0.62% to +0.69% feedback voltage accuracy (40C to +125C RAMP1 junction temperature) 2.75V BST1 TO 18.0V PVIN1 Channel 1 and Channel 2: 7 A synchronous buck regulator C3 L1 C2 VOUT1 SW1 (9.4 A minimum valley current limit) CHANNEL 1 FB1 COMP1 7A BUCK C4 Channel 1 and Channel 2: 14 A output in parallel operation PGND Channel 3: 3 A synchronous buck regulator (4.2 A minimum EN1 valley current limit) RAMP2 250 kHz to 2500 kHz adjustable switching frequency BST2 PVIN2 C6 External compensation for fast load transient response L2 VOUT2 C5 SW2 CHANNEL 2 Precision enable pin with 0.615 V accurate reference voltage COMP2 FB2 7A BUCK C7 Programmable power-up and power-down sequence PGND EN2 Selective FPWM/PSM mode selection RAMP3 Frequency synchronization input or output BST3 Power-good flag for three channels PVIN3 C9 L3 VOUT3 Active output discharge switch SW3 C8 CHANNEL 3 FB3 UVLO, overcurrent protection, and TSD protection 3A BUCK COMP3 C10 43-terminal, 5 mm 5.5 mm LGA package PGND EN3 APPLICATIONS GND PWRGD LOGIC Small cell base stations CFG1 GND CFG2 Field programmable gate array (FPGA) and processor applications GND Security and surveillance Figure 1. Medical applications GENERAL DESCRIPTION The ADP5056 combines three high performance buck regulators The switching frequency of the ADP5056 can be programmed in a 43-terminal land grid array (LGA) package that meets the or synchronized to an external clock. The ADP5056 contains an demanding performance and board space requirements. The enable pin (ENx) on each channel for easy power-up sequencing device enables direct connection to high input voltages up to or adjustable undervoltage lockout (UVLO) threshold. 18 V with no preregulators. The ADP5056 integrates start-up/shutdown sequence control, All channels integrate both high-side and low-side power metal- forced pulse-width modulation/power saving mode (FPWM/PSM) oxide semiconductor field effect transistors (MOSFETs) to achieve selection, an output discharge switch, and a power-good signal. an efficiency optimized solution. Channel 1 and Channel 2 The ADP5056 is rated at 40C to +150C junction temperature. deliver a programmable output current of 3.5 A or 7 A, or Note that throughout this data sheet, multifunction pins, such provide a single output with up to 14 A of current in parallel as SYNC/MODE, are referred to either by the entire pin name operation. Channel 3 delivers a programmable output current or by a single function of the pin, for example, SYNC, when of 1.5 A or 3 A. only that function is relevant. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2020 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 17270-001ADP5056 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 UVLO ........................................................................................... 20 Applications ....................................................................................... 1 Power-Good Function ............................................................... 20 Typical Application Circuit ............................................................. 1 Power-Up at High Temperature ............................................... 20 General Description ......................................................................... 1 Thermal Shutdown .................................................................... 20 Revision History ............................................................................... 2 Applications Information .............................................................. 21 Functional Block Diagram .............................................................. 3 Programming the Adjustable Output Voltage ........................ 21 Specifications ..................................................................................... 4 Voltage Conversion Limitations ............................................... 21 Buck Regulator Specifications .................................................... 5 Current-Limit Setting ................................................................ 21 Absolute Maximum Ratings ............................................................ 7 Soft Start Setting ......................................................................... 21 Thermal Resistance ...................................................................... 7 Inductor Selection ...................................................................... 21 ESD Caution .................................................................................. 7 Output Capacitor Selection ....................................................... 22 Pin Configuration and Function Descriptions ............................. 8 Input Capacitor Selection .......................................................... 22 Typical Performance Characteristics ........................................... 10 Programming the UVLO Input ................................................ 23 Theory of Operation ...................................................................... 14 Slope Compensation Setting ..................................................... 23 Buck Regulator Operational Modes ......................................... 14 Compensation Components Design ....................................... 23 Adjustable Output Voltages ....................................................... 14 Power Dissipation....................................................................... 24 Internal Regulators (VREG) ..................................................... 14 Junction Temperature ................................................................ 24 Separate Supply Applications .................................................... 14 Typical Application Circuits ..................................................... 25 Bootstrap Circuitry .................................................................... 15 Design Example .............................................................................. 28 Active Output Discharge Switch .............................................. 15 Setting the Switching Frequency .............................................. 28 Precision Enabling ...................................................................... 15 Setting the Output Voltage ........................................................ 28 Sequence Mode ........................................................................... 15 Setting the Configurations (CFG1 and CFG2) .......................... 28 Oscillator ..................................................................................... 16 Selecting the Inductor ................................................................ 28 Synchronization Input/Output ................................................. 16 Selecting the Output Capacitor ................................................ 29 Soft Start ...................................................................................... 17 Designing the Compensation Network ................................... 29 Function Configurations (CFG1 and CFG2) ......................... 17 Selecting the Input Capacitor ................................................... 29 Parallel Operation....................................................................... 18 Circuit Board Layout Recommendations ................................... 30 Fast Transient Mode ................................................................... 19 Outline Dimensions ....................................................................... 31 Startup with Precharged Output .............................................. 19 Ordering Guide .......................................................................... 31 Current-Limit Protection .......................................................... 19 REVISION HISTORY 5/2020Revision 0: Initial Version Rev. 0 Page 2 of 31