2 Tiny I C Programmable Linear Battery Charger with Power Path and USB Mode Compatibility Data Sheet ADP5061 FEATURES TYPICAL APPLICATION CIRCUIT 2.6 mm 2 mm WLCSP package ADP5061 2 ISO S SYSTEM VBUS AC OR VIN Fully programmable via I C USB CBP C3 Flexible digital control inputs 47F C1 C2 10F 10nF Up to 2.1 A current from an ac charger in LDO mode Operating input voltage from 4.0 V to 6.7 V SCL Tolerant input voltage from 0.5 V to +20 V (USB VBUS) SDA ISO B CHARGER C4 BAT SNS Fully compatible with USB 3.0 and USB Battery Charging CONTROL DIG IO1 22F BLOCK Li-ion + DIG IO2 Specification 1.2 DIG IO3 THR Built-in current sensing and limiting SYS EN As low as 30 m battery isolation FET between battery and ILED VLED charger output AGND Thermal regulation prevents over heating Compliant with JEITA 1 and JEITA 2 Li-Ion battery charging Figure 1. temperature specifications SYS EN flag permits the system to be disabled until battery is at minimum required level for guaranteed system start-up APPLICATIONS Digital still cameras Digital video cameras Single cell Li-Ion portable equipment PDAs, audio, and GPS devices Portable medical devices Mobile phones GENERAL DESCRIPTION The ADP5061 charger is fully compliant with USB 3.0 and the Based on the type of USB source, which is detected by an external USB Battery Charging Specification 1.2 and enables charging USB detection chip, the ADP5061 can be set to apply the correct via the mini USB VBUS pin from a wall charger, car charger, or current limit for optimal charging and USB compliance. USB host port. The ADP5061 has three factory programmable digital The ADP5061 operates from a 4 V to 6.7 V input voltage range input/output pins that provide maximum flexibility for different but is tolerant of voltages up to 20 V. The 20 V voltage tolerance systems. These digital input/output pins permit combinations of alleviates the concerns about the USB bus spiking during dis- features such as, input current limits, charging enable and connect or connect scenarios. disable, charging current limits, and a dedicated interrupt output pin. The ADP5061 features an internal FET between the linear charger output and the battery. This permits battery isolation and, hence, system powering under a dead battery or no battery scenario, which allows for immediate system function on connec- tion to a USB power supply. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20122013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com PROGRAMMABLE 10544-001ADP5061 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Battery Isolation FET ................................................................. 20 Applications ....................................................................................... 1 Battery Detection ....................................................................... 20 Typical Application Circuit ............................................................. 1 Battery Pack Temperature Sensing .......................................... 21 2 General Description ......................................................................... 1 I C Interface ................................................................................ 25 2 Revision History ............................................................................... 2 I C Register Map ......................................................................... 26 Specifications ..................................................................................... 3 Register Bit Descriptions ........................................................... 27 Recommended Input and Output Capacitances ...................... 6 Applications Information .............................................................. 35 2 I C-Compatible Interface Timing Specifications ..................... 6 External Components ................................................................ 35 Absolute Maximum Ratings ....................................................... 7 PCB Layout Guidelines.............................................................. 37 Thermal Resistance ...................................................................... 7 Power Dissipation and Thermal Considerations ....................... 38 ESD Caution .................................................................................. 7 Charger Power Dissipation ....................................................... 38 Pin Configuration and Function Descriptions ............................. 8 Junction Temperature ................................................................ 38 Typical Performance Characteristics ............................................. 9 Factory Programmable Options ................................................... 39 Temperature Characteristics ..................................................... 11 Charger Options ......................................................................... 39 2 Typical Waveforms ..................................................................... 13 I C Register Defaults .................................................................. 40 Theory of Operation ...................................................................... 14 Digital Input and Output Options ........................................... 40 Summary of Operation Modes ................................................. 14 Packaging and Ordering Information ......................................... 42 Introduction ................................................................................ 15 Outline Dimensions ................................................................... 42 Charger Modes............................................................................ 17 Ordering Guide .......................................................................... 42 Thermal Management ............................................................... 20 REVISION HISTORY 9/13Rev. B to Rev. C Changes to Charger Options Section and Table 42 ................... 39 Changes to Table 6 ............................................................................ 8 Changes to Table 50 ....................................................................... 41 Changes to Table 8 .......................................................................... 14 Changes to Ordering Guide .......................................................... 42 Change to Bits 6:2 , Table 22 ........................................................ 29 Change to Bits 7:5 , Table 33 ........................................................ 34 8/12Rev. 0 to Rev. A Changes to Factory Programmable Section, Table 39, Table 40, Changes to Figure 2 ........................................................................... 6 and Table 42 ..................................................................................... 39 Changes to Figure 23 to Figure 28 ............................................... 13 Changes to Table 50 ........................................................................ 41 Changes to Table 8 .......................................................................... 14 Changes to Ordering Guide .......................................................... 42 Changes to Table 21 ....................................................................... 28 Changes to Table 26 ....................................................................... 31 10/12Rev. A to Rev. B Changes to Table 33 ....................................................................... 34 Deleted Bit No. 6 Row, Table 22 .................................................... 29 Changed Bit No. 5:2 to Bit No. 6:2 , Table 22 ......................... 29 6/12Revision 0: Initial Version Changes to Bit No. 2:0 , Default Column, Table 26 ................. 31 Rev. C Page 2 of 44