2 A/1.2 A DC-to-DC Switching Regulator with Independent Positive and Negative Outputs Data Sheet ADP5071 FEATURES TYPICAL APPLICATION CIRCUIT Wide input supply voltage range: 2.85 V to 15 V ADP5071 SS INBK Generates well regulated, independently resistor R C1 L1 programmable V and V outputs COMP1 POS NEG V POS C C1 Boost regulator to generate V output SW1 POS EN1 D1 Adjustable positive output to 39 V C R VREG FT1 FB1 VREG Integrated 2.0 A main switch C OUT1 R FB1 Optional single-ended primary-inductor converter PVIN1 V IN PVIN2 PGND (SEPIC) configuration for automatic step-up/step-down PVINSYS C C IN1 VREF Inverting regulator to generate V output NEG VREF EN2 Adjustable negative output to V 39 V IN R FB2 C OUT2 R C2 Integrated 1.2 A main switch FB2 COMP2 R FT2 C C2 True shutdown for both positive and negative outputs SYNC/FREQ SW2 1.2 MHz/2.4 MHz switching frequency with optional external SLEW V NEG D2 SEQ frequency synchronization from 1.0 MHz to 2.6 MHz AGND L2 Resistor programmable soft start timer Slew rate control for lower system noise Figure 1. Individual precision enable and flexible start-up sequence control for symmetric start, V first, or V first POS NEG Out-of-phase operation UVLO, OCP, OVP, and TSD protection 4 mm 4 mm, 20-lead LFCSP and 20-lead TSSOP 40C to +125C junction temperature range Supported by the ADIsimPower tool set APPLICATIONS Bipolar amplifiers, ADCs, DACs, and multiplexers Charge-coupled device (CCD) bias supply Optical module supply RF power amplifier (PA) bias GENERAL DESCRIPTION The ADP5071 is a dual high performance dc-to-dc regulator that The ADP5071 includes a fixed internal or resistor programmable generates independently regulated positive and negative rails. soft start timer to prevent inrush current at power-up. During The input voltage range of 2.85 V to 15 V supports a wide variety of shutdown, both regulators completely disconnect the loads from applications. The integrated main switch in both regulators enables the input supply to provide a true shutdown. generation of an adjustable positive output voltage up to +39 V Other key safety features in the ADP5071 include overcurrent and a negative output voltage down to 39 V below input voltage. protection (OCP), overvoltage protection (OVP), thermal The ADP5071 operates at a pin selected 1.2 MHz/2.4 MHz shutdown (TSD), and input undervoltage lockout (UVLO). switching frequency. The ADP5071 can synchronize with an The ADP5071 is available in a 20-lead LFCSP or in a 20-lead external oscillator from 1.0 MHz to 2.6 MHz to ease noise TSSOP and is rated for a 40C to +125C junction temperature filtering in sensitive applications. Both regulators implement range. programmable slew rate control circuitry for the MOSFET Table 1. Family Models driver stage to reduce electromagnetic interference (EMI). Model Boost Switch (A) Inverter Switch (A) Flexible start-up sequencing is provided with the options of ADP5070 1.0 0.6 manual enable, simultaneous mode, positive supply first, and ADP5071 2.0 1.2 negative supply first. Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20152019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 12069-001ADP5071 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Soft Start ...................................................................................... 15 Applications ....................................................................................... 1 Slew Rate Control ....................................................................... 15 Typical Application Circuit ............................................................. 1 Current-Limit Protection ............................................................ 15 General Description ......................................................................... 1 Overvoltage Protection .............................................................. 15 Revision History ............................................................................... 2 Thermal Shutdown .................................................................... 15 Specif icat ions ..................................................................................... 3 Start-Up Sequence ...................................................................... 15 Absolute Maximum Ratings ............................................................ 5 Applications Information .............................................................. 17 Thermal Resistance ...................................................................... 5 ADIsimPower Design Tool ....................................................... 17 ESD Caution .................................................................................. 5 Component Selection ................................................................ 17 Pin Configurations and Function Descriptions ........................... 6 Loop Compensation .................................................................. 20 Typical Performance Characteristics ............................................. 8 Common Applications .............................................................. 22 Theory of Operation ...................................................................... 14 Super Low Noise With Optional LDOs................................... 24 PWM Mode ................................................................................. 14 SEPIC Step-Up/Step-Down Operation ................................... 25 PSM Mode ................................................................................... 14 Layout Considerations ............................................................... 26 Undervoltage Lockout (UVLO) ............................................... 14 Outline Dimensions ....................................................................... 27 Oscillator and Synchronization ................................................ 14 Ordering Guide .......................................................................... 27 Internal Regulators ..................................................................... 14 Precision Enabling ...................................................................... 15 REVISION HISTORY 7/2019Rev. D to Rev. E Change to Pull-Down Resistance Parameter, Table 2 ................... 3 Replaced Figure 7 ............................................................................. 8 Changes to Table 3 and Table 4 ....................................................... 5 Added Figure 3, Renumbered Sequentially ................................... 6 3/2019Rev. C to Rev. D Changes to Figure 37 Caption to Figure 39 Caption ................. 13 Changes to Figure 48 ...................................................................... 24 Changes to Internal Regulators Section ...................................... 14 Change to Soft Start Section ......................................................... 15 6/2018Rev. B to Rev. C Changes to Component Selection Section .................................. 17 Changes to Figure 34, Figure 35, and Figure 36 ......................... 13 Changes to Output Capacitors Section, Soft Start Resistor Section, and Diodes Section ......................................................................... 18 7/2017Rev. A to Rev. B Changes to Figure 52 Caption ...................................................... 26 Changes to Table 10 and Table 11 ................................................ 23 Added Figure 53 ............................................................................. 26 Updated Outline Dimensions ....................................................... 27 Updated Outline Dimensions ....................................................... 27 Changes to Ordering Guide .......................................................... 27 Changes to Ordering Guide .......................................................... 27 6/2015Rev. 0 to Rev. A 2/2015Revision 0: Initial Version Added 20-Lead TSSOP ...................................................... Universal Rev. E Page 2 of 27