X-On Electronics has gained recognition as a prominent supplier of ADP5600CP-EVALZ Power Management IC Development Tools across the USA, India, Europe, Australia, and various other global locations. ADP5600CP-EVALZ Power Management IC Development Tools are a product manufactured by Analog Devices. We provide cost-effective solutions for Power Management IC Development Tools, ensuring timely deliveries around the world.

ADP5600CP-EVALZ Analog Devices

ADP5600CP-EVALZ electronic component of Analog Devices
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Part No.ADP5600CP-EVALZ
Manufacturer: Analog Devices
Category: Power Management IC Development Tools
Description: Power Management IC Development Tools Demo - Inv Chrg Pump & Low Noise neg LDO
Datasheet: ADP5600CP-EVALZ Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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Interleaved Inverting Charge Pump with Negative LDO Regulator Data Sheet ADP5600 FEATURES TYPICAL APPLICATIONS CIRCUITS Input voltage: 2.7 V to 16 V ADP5600 V = 12V IN Maximum output current: 100 mA VIN C1+ R C PGOOD C C1 IN Integrated power MOSFETs 10k 10F 1F C1 PGOOD Four LDO selectable output voltage options C2+ ON 0.505 V, 1.5 V, 2.5 V, 5 V C C2 OFF EN 1F Adjustable output voltage range: 0.505 V to V + 0.5 V C2 IN V = ~12V CPOUT SYNC Programmable charge pump switching frequency range CPOUT C R CPOUT 100 kHz to 1 MHz T 10F 110k CPOUT Frequency synchronization via SYNC pin FREQ V = 2.5V LDO OUT Precision enable and power good LDO OUT SEL1 C LDO OUT Internal soft start 2.2F FB SEL2 Output short-circuit and overload protection GND Shorted charge pump fly capacitor protection Integrated LDO output discharge resistor Figure 1. Fixed Output Voltage, V = 2.5 V LDO OUT 16-lead, 4 mm 4 mm LFCSP ADP5600 V = 12V IN APPLICATIONS C1+ VIN C C1 C R IN PGOOD Powering the negative rail on bipolar/split supply 1F 10F 10k C1 ADC/DAC/AMP/mux applications PGOOD C2+ ON C C2 OFF 1F EN C2 V = ~12V CPOUT SYNC CPOUT C R CPOUT T 10F 110k CPOUT FREQ V = 7.5V ADJ LDO OUT SEL1 R C 1 LDO OUT 49.9k 2.2F SEL2 FB GND R 2 100k Figure 2. Adjustable Output Voltage, VADJ = 7.5 V GENERAL DESCRIPTION The ADP5600 is an interleaved charge pump inverter with an The ADP5600 also features comprehensive fault protection for integrated, negative, low dropout (LDO) linear regulator. The robust applications. These protections include overload protection, shorted fly capacitor protection, undervoltage lockout (UVLO), interleaved charge pump inverter exhibits reduced output voltage ripple and reflected input current noise over conventional and thermal shutdown. For easy sequencing, the ADP5600 has a inductive or conventional capacitive based solutions. The power-good pin. integrated LDO provides a rail with good regulation at sufficient The integrated LDO of the ADP5600 uses an advanced proprie- power supply rejection ratio (PSRR). tary architecture to provide high power supply rejection. It also The ADP5600 charge pump operates via resistor programming or achieves decent line and load transient response with only a small external clock synchronization at switching frequency range of 2.2 F ceramic output capacitor. The output can be configured 100 kHz to 1 MHz. Operating at a higher switching frequency via the SEL1 and SEL2 pins to one of four fixed output voltages and allows the use of small input, output, and fly capacitors. To is adjustable from 0.505 V to VIN + 0.5 V via an external combine the high switching frequency with internal field effect feedback divider. transistors (FETs), compensation, and soft start gives a best-in- class total solution size for negative rail generation. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20202021 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com 21096-001 21096-002ADP5600 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Oscillator ..................................................................................... 17 Applications ...................................................................................... 1 Synchronization ......................................................................... 17 Typical Applications CircuitS ......................................................... 1 Current-Limit and Output Short-Circuit Protection (SCP) 18 General Description ......................................................................... 1 Power Good ................................................................................ 18 Revision History ............................................................................... 2 Undervoltage Lockout (UVLO) ............................................... 18 Specifications .................................................................................... 3 Thermal Considerations ........................................................... 19 Charge Pump Regulator Specifications ..................................... 4 Applications Information ............................................................. 20 LDO Regulator Specifications .................................................... 4 Capacitor Selection ...................................................................... 20 Recommended Input and Output Capacitor Specifications .. 5 Output Voltage Settings ............................................................ 20 Absolute Maximum Ratings ........................................................... 6 Noise Reduction .......................................................................... 21 Thermal Resistance ...................................................................... 6 Changing the Oscillator Source On-the-Fly .............................. 21 ESD Caution.................................................................................. 6 Design Example .............................................................................. 23 Pin Configuration and Function Descriptions ............................ 7 Setting the Switching Frequency of the Charge Pump ......... 23 Typical Performance Characteristics ............................................. 8 Selecting the Charge Pump Flying Capacitor ............................ 23 Theory of Operation ...................................................................... 14 Setting the Output Voltage of the LDO Regulator ................ 23 Inverting Charge Pump Operation .......................................... 14 Determining the Minimum VIN Voltage ................................ 23 Interleaved Inverting Charge Pump Operation ..................... 15 Circuit Board Layout Recommendations ................................... 24 Charge Pump Output Resistance ............................................. 16 Outline Dimensions ....................................................................... 25 Negative LDO Regulator ........................................................... 16 Ordering Guide .......................................................................... 25 Startup and Soft Start ................................................................. 16 Precision Enable/Shutdown ...................................................... 17 REVISION HISTORY 4/2021Rev. 0 to Rev. A Change to Note 1, Table 6 ............................................................... 6 Changes to Typical Performance Characteristics Section .......... 8 Change to Figure 40 ....................................................................... 14 Changes to Interleaved Inverting Charge Pump Operation Section .............................................................................................. 15 Changes to Noise Reduction Section ........................................... 21 Changes to Setting the Output Voltage of the LDO Regulator Section .............................................................................................. 23 Changes to Figure 65 Caption ...................................................... 25 7/2020Revision 0: Initial Version Rev. A Page 2 of 25

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