2 A, Ultralow Noise, High PSRR, RF Linear Regulator Data Sheet ADP7158 FEATURES TYPICAL APPLICATION CIRCUIT Input voltage range: 2.3 V to 5.5 V ADP7158 V = 3.8V V = 3.3V IN OUT 16 standard voltages between 1.2 V and 3.3 V available VIN VOUT C C Maximum load current: 2 A IN OUT 10F 10F VOUT SENSE Low noise ON 0.9 V rms total integrated noise from 100 Hz to 100 kHz EN 1.6 V rms total integrated noise from 10 Hz to 100 kHz REF OFF C REF Noise spectral density: 1.7 nV/Hz from 10 kHz to 1 MHz BYP C 1F BYP REF SENSE 1F Power supply rejection ratio (PSRR) 70 dB from 1 kHz to 100 kHz 50 dB at 1 MHz, V = 3.3 V, OUT VREG C REG 1F V = 4.0 V IN GND (EPAD) Dropout voltage: 200 mV typical at I = 2 A, V = 3.3 V OUT OUT Initial accuracy: 0.6% at I = 10 mA LOAD Figure 1. Accuracy over line, load, and temperature: 1.5% Quiescent current: I = 4.0 mA at no load, 9.0 mA at 2 A GND Table 1. Related Devices Low shutdown current: 0.2 A Input Output Fixed/ 1 Stable with a 10 F ceramic output capacitor Model Voltage Current Adj Package 10-lead, 3 mm 3 mm LFCSP and 8-lead SOIC packages ADP7159 2.3 V to 5.5 V 2 A Adj 10-lead LFCSP/ Precision enable 8-lead SOIC ADP7156, 2.3 V to 5.5 V 1.2 A Fixed/ 10-lead LFCSP/ Supported by ADIsimPower tool ADP7157 Adj 8-lead SOIC APPLICATIONS ADM7150, 4.5 V to 16 V 800 mA Fixed/ 8-lead LFCSP/ ADM7151 Adj 8-lead SOIC Regulation to noise sensitive applications: phase-locked ADM7154, 2.3 V to 5.5 V 600 mA Fixed/ 8-lead LFCSP/ loops (PLLs), voltage controlled oscillators (VCOs), and ADM7155 Adj 8-lead SOIC PLLs with integrated VCOs ADM7160 2.2 V to 5.5 V 200 mA Fixed 6-lead LFCSP/ Communications and infrastructure 5-lead TSOT Backhaul and microwave links 1 Adj means adjustable. GENERAL DESCRIPTION 1k The ADP7158 is a linear regulator that operates from 2.3 V to C = 1F BYP C = 10F 5.5 V and provides up to 2 A of output current. Using an advanced BYP C = 100F BYP proprietary architecture, it provides high power supply rejection C = 1000F BYP 100 and ultralow noise, achieving excellent line and load transient response with only a 10 F ceramic output capacitor. There are 16 standard output voltages for the ADP7158. The 10 following voltages are available from stock: 1.2 V, 1.8 V, 2.0 V, 2.5 V, 2.8 V, 3.0 V, and 3.3 V. Additional voltages available by special order are 1.3 V, 1.5 V, 1.6 V, 2.2 V, 2.6 V, 2.7 V, 2.9 V, 1 3.1 V, and 3.2 V. The ADP7158 regulator typical output noise is 0.9 V rms 0.1 from 100 Hz to 100 kHz and 1.7 nV/Hz for noise spectral 10 100 1k 10k 100k 1M 10M density from 10 kHz to 1 MHz. The ADP7158 is available in a FREQUENCY (Hz) 10-lead, 3 mm 3 mm LFCSP and 8-lead SOIC packages, Figure 2. Noise Spectral Density at Various Values of C , V = 3.3 V BYP OUT making it not only a very compact solution, but also providing excellent thermal performance for applications requiring up to 2 A of output current in a small, low profile footprint. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20162019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. NOISE SPECTRAL DENSITY (nV/Hz) 12896-001 12896-002ADP7158 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 13 Applications ....................................................................................... 1 Applications Information .............................................................. 14 General Description ......................................................................... 1 ADIsimPower Design Tool ....................................................... 14 Typical Application Circuit ............................................................. 1 Capacitor Selection .................................................................... 14 Revision History ............................................................................... 2 UVLO ........................................................................................... 15 Specifications ..................................................................................... 3 Programmable Precision Enable .............................................. 16 Input and Output Capacitors, Recommended Specifications 4 Start-Up Time ............................................................................. 17 Absolute Maximum Ratings ............................................................ 5 REF, BYP, and VREG Pins ......................................................... 17 Thermal Data ................................................................................ 5 Current Limit and Thermal Shutdown ................................... 17 Thermal Resistance ...................................................................... 5 Thermal Considerations ............................................................ 17 ESD Caution .................................................................................. 5 PCB Layout Considerations .......................................................... 20 Pin Configurations and Function Descriptions ........................... 6 Outline Dimensions ....................................................................... 21 Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 22 REVISION HISTORY 1/2019Rev. B to Rev. C Updated Outline Dimensions ....................................................... 21 Changes to Ordering Guide .......................................................... 22 11/2016Rev. A to Rev. B Changes to Table 3 ............................................................................ 4 5/2016Rev. 0 to Rev. A Added Note 1 to Table 2 Renumbered Sequentially ................... 4 Change to Figure 4 ........................................................................... 6 Change to Programmable Precision Enable Section ................. 16 3/2016Revision 0: Initial Version Rev. C Page 2 of 22