500 mA, Ultralow Noise, High PSRR, Low Dropout Linear Regulator Data Sheet ADP7185 FEATURES TYPICAL APPLICATION CIRCUITS Input voltage range: 2.0 V to 5.5 V EP Maximum output current: 500 mA V = 3.8V VIN VOUT V = 3.3V IN OUT C Fixed output voltage options: 0.5 V to 4.5 V C IN OUT 4.7F 4.7F SENSE Adjustable output from 0.5 V to V + 0.5 V IN ADP7185 Low output noise: 4 V rms from 100 Hz to 100 kHz +1.25V VA C C OFF 0V EN AFB A Noise spectral density: 20 nV/Hz, 10 kHz to 1 MHz 1F 10nF 1.3V VAFB PSRR at 500 mA load ON VREG GND 68 dB at 10 kHz C REG 50 dB at 100 kHz 1F 40 dB at 1 MHz Figure 1. ADP7185 with Fixed Output Voltage, 3.3 V Low dropout voltage: 190 mV typical at 500 mA load Initial output voltage (V ) accuracy: 0.5% OUT Output voltage accuracy over line, load, and temperature: EP V = 3V VIN VOUT V = 2.5V IN OUT 2.2% C C IN OUT 4.7F SENSE 4.7F Operating supply current (I ): 0.6 mA typical at no load GND ADP7185 Low shutdown current: 2 A typical at V = 5.5 V IN +1.25V VA R1 C Stable with small 4.7 F ceramic input and output capacitor C A OFF 0V EN AFB 100k 1F 10nF 1.3V VAFB Positive or negative enable logic ON R2 Current-limit and thermal overload protection VREG GND 24.9k C 8-lead, 2 mm 2 mm LFCSP package REG 1F Supported by ADIsimPOWER voltage regulator design tool Figure 2. ADP7185 with Adjustable Output Voltage, VOUT = 2.5 V APPLICATIONS Regulation to noise sensitive applications: analog-to-digital converters (ADCs), digital-to-analog converters (DACs), precision amplifiers Communications and infrastructure Medical and healthcare Industrial and instrumentation GENERAL DESCRIPTION The ADP7185 is a complementary metal oxide semiconductor Additional voltages available by special order are 0.8 V, 0.9 V, (CMOS), low dropout (LDO) linear regulator that operates 1.3 V, 2.8 V, 4.2 V, and 4.5 V. An adjustable version is also from 2.0 V to 5.5 V and provides up to 500 mA of output available which allows output voltages that range from 0.5 V to current. This high output current LDO is ideal for regulation of VIN + 0.5 V with an external feedback divider. high performance analog and mixed signal circuits operating The enable logic feature is capable of interfacing with positive from 0.5 V down to 4.5 V. Using an advanced proprietary or negative logic levels for maximum flexibility. architecture, the ADP7185 provides high power supple rejection The ADP7185 regulator output noise is 4 V rms independent ratio (PSRR) and low noise, and it achieves excellent line and load of the output voltage. The ADP7185 is available in an 8-lead, transient response with a small 4.7 F ceramic output capacitor. 2 mm 2 mm LFCSP, making it not only a very compact The ADP7185 is available in 15 fixed output voltage options. solution but also providing excellent thermal performance for The following voltages are available from stock: 0.5 V, 1.0 V, applications requiring up to 500 mA of output current in a 1.2 V, 1.5 V, 1.8 V, 2.0 V, 2.5 V, 3.0 V, and 3.3 V. small, low profile footprint. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 13932-001 13932-002ADP7185 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 13 Applications ....................................................................................... 1 Adjustable Mode Operation ..................................................... 13 Typical Application Circuits ............................................................ 1 Enable Pin Operation ................................................................ 13 General Description ......................................................................... 1 Start-Up Time ............................................................................. 14 Revision History ............................................................................... 2 Applications Information .............................................................. 15 Specif icat ions ..................................................................................... 3 ADIsimPower Design Tool ....................................................... 15 Input and Output Capacitor Recommended Specifications ... 4 Capacitor Selection .................................................................... 15 Absolute Maximum Ratings ............................................................ 5 Undervoltage Lockout (UVLO) ............................................... 16 Thermal Data ................................................................................ 5 Current-Limit and Thermal Overload Protection ................. 16 Thermal Resistance ...................................................................... 5 Thermal Considerations ............................................................ 17 ESD Caution .................................................................................. 5 Outline Dimensions ....................................................................... 19 Pin Configuration and Function Descriptions ............................. 6 Ordering Guide .......................................................................... 19 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 5/2017Revision 0: Initial Version Rev. 0 Page 2 of 19