18 GHz to 44 GHz, GaAs, pHEMT, 32 dBm (>1 W), MMIC Power Amplifier Data Sheet ADPA7005 FEATURES FUNCTIONAL BLOCK DIAGRAM ADPA7005 Output P1dB: up to 31 dBm typical P : up to 32 dBm typical SAT Gain: up to 15.5 dB typical Output IP3: up to 42.5 dBm typical Supply voltage: 5 V at 1400 mA 50 matched input/output 1 13 V V DD1 DD2 18-terminal, 7 mm 7 mm LCC HS package V 2 12 V Integrated power detector DD3 DD4 V 3 11 V DD5 DD6 APPLICATIONS V 4 10 V GG1 GG2 Military and space Test instrumentation Communications Figure 1. GENERAL DESCRIPTION The ADPA7005 is a gallium arsenide (GaAs), pseudomorphic electronic countermeasure and instrumentation applications high electron mobility transfer (pHEMT), monolithic microwave requiring >30 dBm of efficient saturated output power. The RF integrated circuit (MMIC), 32 dBm saturated output power input/outputs are internally matched and dc blocked for ease of (>1 W) power amplifier, with an integrated temperature integration into higher level assemblies. The ADPA7005 is compensated, on-chip power detector that operates between packaged in a 7 mm 7 mm, 18-terminal ceramic leadless chip carrier with heat sink (LCC HS) that exhibits low thermal 18 GHz and 44 GHz. The ADPA7005 provides 15.5 dB of small signal gain and approximately 32 dBm of saturated output power at resistance and is compatible with surface-mount manufacturing 32 GHz from a 5 V supply (see Figure 26). The ADPA7005 has techniques. an IP3 of 40 dBm and is ideal for linear applications such as Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 5 18 VREF NIC GND 6 17 GND 16 RFOUT RFIN 7 8 15 GND GND NIC 9 14 VDET 20102-001ADPA7005 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................8 Applications ....................................................................................... 1 Constant IDD Operation ............................................................. 15 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 16 General Description ......................................................................... 1 Applications Information .............................................................. 17 Revision History ............................................................................... 2 Biasing ADPA7005 with the HMC980LP4E ............................... 18 Specifications ..................................................................................... 3 Application Circuit Setup .......................................................... 18 18 GHz to 20 GHz Frequency Range ......................................... 3 Limiting VGATE and VNEG for ADPA7005 V Absolute GGx Maximum Rating Requirement................................................ 18 20 GHz to 24 GHz Frequency Range ......................................... 3 HMC980LP4E Bias Sequence ................................................... 21 24 GHz to 34 GHz Frequency Range ......................................... 4 Constant Drain Current Biasing vs. Constant Gate Voltage 34 GHz to 44 GHz Frequency Range ......................................... 4 Biasing .......................................................................................... 21 Absolute Maximum Ratings ............................................................ 5 Outline Dimensions ....................................................................... 23 Thermal Resistance ...................................................................... 5 Ordering Guide .......................................................................... 23 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Interface Schematics..................................................................... 7 REVISION HISTORY 11/2019Revision 0: Initial Version Rev. 0 Page 2 of 23