Photometric Front Ends Data Sheet ADPD105/ADPD106/ADPD107 FEATURES GENERAL DESCRIPTION Multifunction photometric front end The ADPD105/ADPD106/ADPD107 are highly efficient, Fully integrated AFE, ADC, LED drivers, and timing core photometric front ends, each with an integrated 14-bit analog- Enables best-in-class ambient light rejection capability to-digital converter (ADC) and a 20-bit burst accumulator that without the need for photodiode optical filters works with flexible light emitting diode (LED) drivers. The Three 370 mA LED drivers accumulator is designed to stimulate an LED and measure Flexible, multiple, short LED pulses per optical sample the corresponding optical return signal. The data output and 2 20-bit burst accumulator enabling 20 bits per sample period functional configuration occur over a 1.8 V I C interface on the On-board sample to sample accumulator, enabling up to ADPD105 or SPI on the ADPD106 and ADPD107. The control 27 bits per data read circuitry includes flexible LED signaling and synchronous Low power operation detection. 2 SPI, I C interface, and 1.8 V analog/digital core The analog front end (AFE) features best-in-class rejection of signal Flexible sampling frequency ranging from 0.122 Hz to 3820 Hz offset and corruption due to modulated interference commonly FIFO data operation caused by ambient light. APPLICATIONS Couple the ADPD105/ADPD106/ADPD107 with a low Wearable health and fitness monitors capacitance photodiode of <100 pF for optimal performance. Clinical measurements, for example, SpO2 The ADPD105/ADPD106/ADPD107 can be used with any LED. Industrial monitoring The ADPD105 is available in a 2.46 mm 1.4 mm WLCSP and a Background light measurements 4 mm 4 mm LFCSP. The SPI only versions, ADPD106 and ADPD107, are available in a 2.46 mm 1.4 mm WLCSP. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. ADPD105/ADPD106/ADPD107 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 LED Driver Pins and LED Supply Voltage .............................. 31 Applications ....................................................................................... 1 LED Driver Operation ............................................................... 31 General Description ......................................................................... 1 Determining the Average Current ........................................... 31 Revision History ............................................................................... 3 Determining CVLED ..................................................................... 32 Functional Block Diagrams ............................................................. 4 LED Inductance Considerations .............................................. 32 Specif icat ions ..................................................................................... 6 Recommended Start-Up Sequence .......................................... 33 Temperature and Power Specifications ..................................... 6 Reading Data ............................................................................... 33 Performance Specifications ......................................................... 7 Clocks and Timing Calibration ................................................ 34 Analog Specifications ................................................................... 8 Optional Timing Signals Available on GPIO0 and GPIO1 .. 35 Digital Specifications ................................................................... 9 Calculating Current Consumption .......................................... 37 Timing Specifications ................................................................ 10 Optimizing SNR per Watt ......................................................... 38 Absolute Maximum Ratings .......................................................... 12 Optimizing Power by Disabling Unused Channels and Amplifiers .................................................................................... 39 Thermal Resistance .................................................................... 12 TIA ADC Mode .......................................................................... 40 Recommended Soldering Profile ............................................. 12 Digital Integrate Mode............................................................... 42 ESD Caution ................................................................................ 12 Pulse Connect Mode .................................................................. 45 Pin Configurations and Function Descriptions ......................... 13 Synchronous ECG and PPG Measurement Using TIA ADC Typical Performance Characteristics ........................................... 17 Mode ............................................................................................ 45 Theory of Operation ...................................................................... 19 Register Listing ............................................................................... 48 Introduction ................................................................................ 19 LED Control Registers ............................................................... 52 Dual Time Slot Operation ......................................................... 19 AFE Global Configuration Registers ....................................... 54 Time Slot Switch ......................................................................... 20 System Registers ......................................................................... 59 Adjustable Sampling Frequency ............................................... 22 ADC Registers ............................................................................ 63 State Machine Operation ........................................................... 23 Data Registers ............................................................................. 64 Normal Mode Operation and Data Flow ................................ 23 Required Start-Up Load Procedure ......................................... 64 AFE Operation ............................................................................ 25 Outline Dimensions ....................................................................... 65 AFE Integration Offset Adjustment ......................................... 25 Ordering Guide .......................................................................... 66 2 I C Serial Interface ...................................................................... 27 SPI Port ........................................................................................ 28 Typical Connection Diagram ................................................... 30 Rev. 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