Silicon, SPDT Switch, Reflective, 24 GHz to 32 GHz Data Sheet ADRF5300 FEATURES FUNCTIONAL BLOCK DIAGRAM RF2 Reflective design Low insertion loss: 1.1 dB ADRF5300 VDD High isolation: 38 dB NVG High input linearity DRIVER RFC CTRL P0.1dB: 37 dBm IP3: 65 dBm GND High RF input power handling 28 dBm average RF1 36 dBm peak Figure 1. 3.3 V single-supply operation Internal negative voltage generator RF settling time (0.1 dB final RF output): 70 ns 20-terminal, 3 mm 3 mm, RoHS-compliant, land grid array package APPLICATIONS Industrial scanner Test instrumentation Cellular infrastructure: 5G millimeter wave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs) GENERAL DESCRIPTION The ADRF5300 is a reflective, SPDT switch manufactured in The ADRF5300 incorporates a negative voltage generator (NVG) the silicon process. to operate with a single positive supply of 3.3 V (VDD) applied to the VDD pin. The device employs CMOS- and low voltage The ADRF5300 is developed for 5G applications ranging from transistor to transistor logic (LVTTL)-compatible controls. 24 GHz to 32 GHz. The ADRF5300 has a low insertion loss of 1.1 dB, a high isolation of 38 dB, and an RF input power The ADRF5300 is packaged in a 20-terminal, 3 mm 3 mm, handling capability of 28 dBm average and 36 dBm peak. RoHS-compliant, land grid array (LGA) package and can operate from 40C to +105C. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 2020 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. 20780-001ADRF5300 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Insertion Loss, Return Loss, and Isolation ................................6 Applications ...................................................................................... 1 Input Power Compression and Third-Order Intercept ..........7 Functional Block Diagram .............................................................. 1 Theory of Operation .........................................................................8 General Description ......................................................................... 1 RF Input and Output ....................................................................8 Revision History ............................................................................... 2 Power Supply .................................................................................8 Specifications .................................................................................... 3 Timing Requirements ...................................................................8 Timing Specifications .................................................................. 3 Applications Information ................................................................9 Absolute Maximum Ratings ........................................................... 4 Layout Considerations .................................................................9 Thermal Resistance ...................................................................... 4 RF and Digital Controls ...............................................................9 Electrostatic Discharge (ESD) Ratings ...................................... 4 Probe Matrix Board ......................................................................9 ESD Caution.................................................................................. 4 Outline Dimensions ....................................................................... 11 Pin Configuration and Function Descriptions ............................ 5 Ordering Guide .......................................................................... 11 Interface Schematics .................................................................... 5 Typical Performance Characteristics ............................................. 6 REVISION HISTORY 9/2020Revision 0: Initial Version Rev. 0 Page 2 of 11