0.5 dB LSB, 6-Bit, Silicon Digital Attenuator, 100 MHz to 40 GHz Data Sheet ADRF5730 FEATURES FUNCTIONAL BLOCK DIAGRAM Ultrawideband frequency range: 100 MHz to 40 GHz Attenuation range: 0.5 dB steps to 31.5 dB Low insertion loss with impedance match 2.1 dB up to 18 GHz 24 23 22 21 20 19 2.9 dB up to 26 GHz 1 18 LE VDD 4.8 dB up to 40 GHz 2 17 PS VSS SERIAL/ PARALLEL Attenuation accuracy with impedance match 3 GND 16 GND INTERFACE (0.10 + 1.0% of attenuation state) up to 18 GHz GND 4 15 GND (0.15 + 0.8% of attenuation state) up to 26 GHz 6-BIT DIGITAL ATTIN 5 ATTOUT 14 ATTENUATOR (0.35 + 2.5% of attenuation state) up to 40 GHz GND 6 13 GND Typical step error with impedance match 789 10 11 12 0.18 dB up to 18 GHz PACKAGE BASE 0.23 dB up to 26 GHz 0.51 dB up to 40 GHz GND High input linearity Figure 1. P0.1dB insertion loss state: 30 dBm P0.1dB other attenuation states: 27 dBm IP3: 50 dBm typical High RF input power handling: 27 dBm average, 30 dBm peak Tight distribution in relative phase No low frequency spurious signals SPI and parallel mode control, CMOS/LVTTL compatible RF settling time (0.1 dB of final RF output): 250 ns 24-terminal, 4 mm 4 mm LGA package Pin compatible with ADRF5720, low frequency cutoff version APPLICATIONS Industrial scanners Test and instrumentation Cellular infrastructure: 5G millimeter wave Military radios, radars, electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs) GENERAL DESCRIPTION The ADRF5730 is a silicon, 6-bit digital attenuator with 31.5 dB The ADRF5730 is pin-compatible with the ADRF5720 low attenuation control range in 0.5 dB steps. frequency cutoff version, which operates from 9 kHz to 40 GHz. This device operates from 100 MHz to 40 GHz with better than The ADRF5730 RF ports are designed to match a characteristic 4.8 dB of insertion loss and excellent attenuation accuracy. The impedance of 50 . For wideband applications, impedance ADRF5730 has a radio frequency (RF) input power handling matching on the RF transmission lines can further optimize high capability of 27 dBm average and 30 dBm peak for all states. frequency insertion loss, return loss, and attenuation accuracy characteristics. Refer to the Electrical Specifications section, the The ADRF5730 requires a dual supply voltage of +3.3 V and Typical Performance Characteristics section, and the Applications 3.3 V. The device features serial peripheral interface (SPI), parallel Information section for more details. mode control, and complementary metal-oxide semiconductor (CMOS)-/low voltage transistor to transistor logic (LVTTL)- The ADRF5730 comes in a 24-terminal, 4 mm 4 mm, RoHS- compatible controls. compliant, land grid array (LGA) package and operates from 40C to +105C. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20182020 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 15958-001 GND D5/CLK GND D4/SERIN GND D3/SEROUT GND D2 GND D1 GND D0ADRF5730 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Insertion Loss, Return Loss, State Error, Step Error, and Relative Phase ................................................................................8 Applications ....................................................................................... 1 Input Power Compression and Third-Order Intercept ......... 12 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 13 General Description ......................................................................... 1 Power Supply ............................................................................... 13 Revision History ............................................................................... 2 RF Input and Output ................................................................. 13 Specif icat ions ..................................................................................... 3 Serial or Parallel Mode Selection ............................................. 14 Electrical Specifications ............................................................... 3 Serial Mode Interface ................................................................. 14 Timing Specifications .................................................................. 5 Parallel Mode Interface .............................................................. 15 Absolute Maximum Ratings ............................................................ 6 Applications Information .............................................................. 16 Power Derating Curves ................................................................ 6 Evaluation Board ........................................................................ 16 ESD Caution .................................................................................. 6 Probe Matrix Board ................................................................... 18 Pin Configuration and Function Descriptions ............................. 7 Outline Dimensions ....................................................................... 19 Interface Schematics..................................................................... 7 Ordering Guide .......................................................................... 19 Typical Performance Characteristics ............................................. 8 REVISION HISTORY 3/2020Rev. 0 Rev. A Changes to RF Power Parameter, Table 1 ...................................... 5 7/2018Revision 0: Initial Version Changes to Table 3 ............................................................................ 6 Changes to Power Supply Section ................................................ 13 Added Power-Up State Section ..................................................... 13 Moved Serial or Parallel Mode Selection Section and Table 7 Renumbered Sequentially ...................................................................... 14 Rev. A Page 2 of 19