950 MHz to 1575 MHz Quadrature Modulator with Integrated Fractional-N PLL and VCO ADRF6750 FEATURES GENERAL DESCRIPTION I/Q modulator with integrated fractional-N PLL and VCO The ADRF6750 is a highly integrated quadrature modulator, Gain control span: 47 dB in 1 dB steps frequency synthesizer, and programmable attenuator. The Output frequency range: 950 MHz to 1575 MHz device covers an operating frequency range from 950 MHz Output 1 dB compression: 8.5 dBm to 1575 MHz for use in satellite, cellular and broadband Output IP3: 23 dBm communications. Noise floor: 162 dBm/Hz The ADRF6750 modulator includes a high modulus fractional-N Baseband modulation bandwidth: 250 MHz (1 dB) frequency synthesizer with integrated VCO, providing better Output frequency resolution: 1 Hz than 1 Hz frequency resolution, and a 47 dB digitally controlled Functions with external VCO for extended frequency range output attenuator with 1 dB steps. 2 SPI and I C-compatible serial interfaces Control of all the on-chip registers is through a user-selected Power supply: 5 V/310 mA 2 SPI interface or I C interface. The device operates from a single power supply ranging from 4.75 V to 5.25 V. FUNCTIONAL BLOCK DIAGRAM VCC1 VCC2 VCC3 VCC4 3.3V REGOUT REGULATOR IBBP VREG1 IBBN VREG2 VREG3 CCOMP1 VREG4 CCOMP2 VREG5 CCOMP3 VREG6 47dB OUTPUT LOMONP GAIN CONTROL 0/90 STAGE RANGE LOMONN VCO VTUNE CORE RFOUT TESTLO TXDIS TESTLO QBBP QBBN RSET REFERENCE 2 5-BIT REFIN 2 + DOUBLER DIVIDER PHASE CHARGE FREQUENCY CP PUMP DETECTOR REFIN LF3 CURRENT SETTING N-COUNTER LF2 LDET THIRD-ORDER SDI/SDA RFCP4 RFCP3 RFCP2 RFCP1 FRACTIONAL SPI/ CLK/SCL INTERPOLATOR 2 I C INTERFACE SDO CS FRACTIONAL MODULUS INTEGER 25 REGISTER 2 REGISTER ADRF6750 AGND DGND Figure 1. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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Trademarks and registered trademarks are the property of their respective owners. 08201-001ADRF6750 TABLE OF CONTENTS 2 Features .............................................................................................. 1 I C Interface ................................................................................ 21 General Description ......................................................................... 1 SPI Interface ................................................................................ 23 Functional Block Diagram .............................................................. 1 Program Modes .......................................................................... 25 Revision History ............................................................................... 2 Register Map ................................................................................... 27 Specif icat ions ..................................................................................... 3 Register Map Summary ............................................................. 27 Timing Characteristics ................................................................ 5 Register Bit Descriptions ........................................................... 28 Absolute Maximum Ratings ............................................................ 7 Suggested Power-Up Sequence ..................................................... 31 ESD Caution .................................................................................. 7 Initial Register Write Sequence ................................................ 31 Pin Configuration and Function Descriptions ............................. 8 Evaluation Board ............................................................................ 32 Typical Performance Characteristics ........................................... 10 General Description ................................................................... 32 Theory of Operation ...................................................................... 18 Hardware Description ............................................................... 32 O ver vie w ...................................................................................... 18 PCB Artwork............................................................................... 35 PLL Synthesizer and VCO ......................................................... 18 Bill of Materials ........................................................................... 38 Quadrature Modulator .............................................................. 20 Outline Dimensions ....................................................................... 39 Attenuator .................................................................................... 21 Ordering Guide .......................................................................... 39 Voltage Regulator ....................................................................... 21 EXTERNAL vco OPERATION ................................................ 21 REVISION HISTORY 4/10Rev. 0 to Rev. A Changes to Table 5 ............................................................................ 9 Changes to LOMON Outputs Section ......................................... 33 Changes to Ordering Guide .......................................................... 39 1/10Revision 0: Initial Version Rev. A Page 2 of 40