5.9 GHz to 23.6 GHz, Wideband, Microwave Upconverter Data Sheet ADRF6780 FEATURES GENERAL DESCRIPTION Wideband RF output frequency range: 5.9 GHz to 23.6 GHz The ADRF6780 is a silicon germanium (SiGe) design, wideband, Two upconversion modes microwave upconverter optimized for point to point microwave Direct conversion from baseband I/Q to RF radio designs operating in the 5.9 GHz to 23.6 GHz frequency Single sideband upconversion from real IF range. LO input frequency range: 5.4 GHz to 14 GHz The upconverter offers two modes of frequency translation. The LO doubler for up to 28 GHz device is capable of direct conversion to radio frequency (RF) Matched 100 balanced RF output, LO input, and IF input from baseband I/Q input signals, as well as single sideband (SSB) High impedance baseband inputs upconversion from a real intermediate frequency (IF) input Sideband suppression and carrier feedthrough optimization carrier frequency. The baseband inputs are high impedance and Variable attenuator and power detector for Tx power control are generally terminated off chip with 100 differential back Programmable via 4-wire SPI interface terminations. The baseband I/Q input path can be disabled and 32-lead, 5 mm 5 mm LFCSP microwave packaging a modulated real IF signal anywhere from 0.8 GHz to 3.5 GHz can APPLICATIONS fed into the IF input path and upconverted to 5.9 GHz to 23.6 GHz while suppressing the unwanted sideband by typically better than Point to point microwave radios 25 dBc. The serial port interface (SPI) allows tweaking of the Radar, electronic warfare systems quadrature phase adjustment to allow optimum sideband Instrumentation, automatic test equipment (ATE) suppression. In addition, the SPI interface allows powering down the output power detector to reduce power consumption when power monitoring is not necessary. The ADRF6780 upconverter comes in a compact, thermally enhanced, 5 mm 5 mm LFCSP package. The ADRF6780 operates over the 40C to +85C temperature range. FUNCTIONAL BLOCK DIAGRAM ALM VPLO LOIP AGND LOIN VPLO SEN SDTO 32 31 30 29 28 27 26 25 ADC VDET 1 24 SCLK SPI LOG 2 23 VPDT SDIN DET 1 2 BIAS VPRF 3 22 VP18 CONTROL AGND 4 21 VPBI RFOP 5 20 IFIP QUAD SPLITTER VVA BUFFER AGND 6 19 AGND 7 18 RFON IFIN AGND 8 17 RST ADRF6780 9 10 11 12 13 14 15 16 VPRF VATT BBQN BBQP BBIP BBIN VPBB PWDN Figure 1. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20162019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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Technical Support www.analog.com 14106-001ADRF6780 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Carrier Feedthrough Nulling .................................................... 23 Applications ....................................................................................... 1 Sideband Suppression Optimization ....................................... 23 General Description ......................................................................... 1 Linearity ....................................................................................... 23 Functional Block Diagram .............................................................. 1 ADC ............................................................................................. 23 Revision History ............................................................................... 2 Wide Frequency Performance .................................................. 24 Specifications ..................................................................................... 3 Layout .......................................................................................... 24 Absolute Maximum Ratings ............................................................ 6 LO Input Driven Differential vs. Single Ended .......................... 25 Thermal Resistance ...................................................................... 6 Register Summary .......................................................................... 27 ESD Caution .................................................................................. 6 Register Details: Wideband Upconverter .................................... 28 Pin Configuration and Function Descriptions ............................. 7 Control Register ......................................................................... 28 Typical Performance Characteristics ............................................. 9 ALARM READBACK Register ............................................... 28 I/Q Mode ....................................................................................... 9 ALARM MASK Register .......................................................... 29 IF Mode ........................................................................................ 14 Enable Register ........................................................................... 29 Output Detector Performance .................................................. 19 Linearize Register ....................................................................... 30 Return Loss.................................................................................. 20 LO PATH Register..................................................................... 30 Theory of Operation ...................................................................... 21 ADC CONTROL Register ....................................................... 31 Baseband ...................................................................................... 21 ADC OUTPUT Register .......................................................... 31 Single Sideband (SSB) Upconversion ...................................... 21 Basic Connections for Operation ................................................. 32 LO Input Path.............................................................................. 21 Outline Dimensions ....................................................................... 35 Serial Port Interface (SPI) .......................................................... 21 Ordering Guide .......................................................................... 35 Applications Information .............................................................. 23 REVISION HISTORY 1/2019Rev. C to Rev. D Changes to ADC Section ............................................................... 23 7/2018Rev. B to Rev. C Changed 32.95 to 9.18 in JA Column, Table 3 ............................. 6 Changes to Ordering Guide .......................................................... 35 10/2017Rev. A to Rev. B Changes to Maximum Junction Temperature Parameter, Table 2 ... 6 Change to Table 4 ......................................................................................... 7 Changes to Figure 31 Caption ................................................................. 13 Changes to Ordering Guide ..................................................................... 35 5/2016Rev. 0 to Rev. A Change to Table 4 ............................................................................. 7 Changes to Figure 40 ...................................................................... 15 Changes to Figure 47 ...................................................................... 16 Changes to Figure 58 ...................................................................... 18 Change to Figure 84 ....................................................................... 33 Changes to Table 16 ........................................................................ 34 3/2016Revision 0: Initial Version Rev. D Page 2 of 35