Ultra Low Power Arm Cortex-M3 MCU with Integrated Power Management Data Sheet ADuCM3027/ADuCM3029 FEATURES Digital peripherals 3 SPI interfaces to enable glueless interface to sensors, EEMBC ULPMark-CP score: 245.5 radios, and converters Ultra low power active and hibernate mode 2 I C and UART interfaces Active mode dynamic current: 30 A/MHz (typical) SPORT for natively interfacing with converters and radios Flexi mode: 300 A (typical) Programmable GPIOs (44 in LFCSP and 34 in WLCSP) Hibernate mode: 750 nA (typical) 3 general-purpose timers with PWM support Shutdown mode: 60 nA (typical) RTC and FLEX RTC with SensorStrobe and time stamping ARM Cortex-M3 processor with MPU Programmable beeper Up to 26 MHz with serial wire debug interface 25-channel DMA controller Power management Clocking features Single-supply operation (V ): 1.74 V to 3.6 V BAT 26 MHz clock: on-chip oscillator, external crystal oscillator Optional buck converter for improved efficiency 32 kHz clock: on-chip oscillator, low power crystal oscillator Memory options Integrated PLL with programmable divider 128 kB/256 kB of embedded flash memory with ECC Analog peripherals 4 kB of cache memory to reduce active power 12-bit SAR ADC, 1.8 MSPS, 8 channels, and digital comparator 64 kB of configurable system SRAM with parity up to 32 kB of SRAM retained in hibernate mode APPLICATIONS Safety Internet of Things (IoT) Watchdog with dedicated on-chip oscillator Electronic shelf label (ESL) and signage Hardware CRC with programmable polynomial Smart infrastructure Multiparity bit protected SRAM Smart lock ECC protected embedded flash Asset tracking Security Smart machine, smart metering, smart building, smart city, TRNG and smart agriculture User code protection Wearables Hardware cryptographic accelerator supporting AES-128, Fitness and clinical AES-256, and SHA-256 Machine learning and neural network FUNCTIONAL BLOCK DIAGRAM 26MHz CORE RATE PLL SERIAL WIRE INSTRUCTION RAM/CACHE (32kB) HFXTAL ARM POWER CORTEX-M3 FLASH LFXTAL MANAGEMENT (256kB) MULTI- LAYER HFOSC BUCK AMBA SRAM0 NVIC WIC BUS (16kB) LFOSC MATRIX MPU REF BUFFER SRAM1 TEMPERATURE DMA (16kB) SENSOR CRYPTO (AES 128/256, ADC SHA 256) SPORT UART TMR0 TMR1 RTC0 RTC1 AHB-APB BRIDGE 2 PROGRAMMABLE SPI SPI SPI I C TMR2 TRNG BEEPER GPIO WDT CRC POLYNOMIAL Figure 1. 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Technical Support ADuCM3027/ADuCM3029 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ARM Cortex-M3 Processor ...................................................... 22 Applications ....................................................................................... 1 Memory Architecture ................................................................ 23 Functional Block Diagram .............................................................. 1 Cache Controller ........................................................................ 24 Revision History ............................................................................... 2 System and Integration Features .............................................. 24 General Description ......................................................................... 3 On-Chip Peripheral Features .................................................... 28 Product Highlights ....................................................................... 3 Development Support ................................................................ 29 Specifications ..................................................................................... 4 Additional Information ............................................................. 29 Operating Conditions and Electrical Characteristics .............. 4 Reference Designs ...................................................................... 29 Embedded Flash Specifications .................................................. 4 MCU Test Conditions ................................................................ 29 Power Supply Current Specifications ......................................... 5 Driver Types ................................................................................ 29 ADC Specifications ...................................................................... 7 EEMBC ULPMark-CP Score .................................................. 30 System Clocks ............................................................................... 8 GPIO Multiplexing ......................................................................... 31 Timing Specifications .................................................................. 9 Applications Information .............................................................. 33 Absolute Maximum Ratings .......................................................... 15 About ADuCM3027/ADuCM3029 Silicon Anomalies ............ 36 Thermal Resistance .................................................................... 15 Functionality Issues .................................................................... 36 ESD Caution ................................................................................ 15 Outline Dimensions ....................................................................... 38 Pin Configuration and Function Descriptions ........................... 16 Ordering Guide .......................................................................... 39 Typical Performance Characteristics ........................................... 20 Theory of Operation ...................................................................... 22 REVISION HISTORY 5/2019Rev. A to Rev. B Change to MMRs (Peripheral Control and Status) Section ..... 23 Change to Features Section ............................................................. 1 Changes to Cache Controller Section and Booting Section ..... 24 Changes to General Description Section ...................................... 3 Changes to Programmable GPIOs Section ................................. 26 2 Change to VBAT ADC Current (I ) Parameter ,Table 7 ....... 7 Changes to I C Section .................................................................. 28 VBAT ADC Added Crystal Equivalent Series Resistance Parameter, Table 8 ..... 8 Changes to Additional Information Section ............................... 29 Change to SPT CLK Period Parameter, Table 12 ........................ 9 Changes to Figure 26 ...................................................................... 33 Changes to Figure 5 and Figure 6 ................................................. 10 Changes to Figure 27 ...................................................................... 34 Changed Timer PWM OUT Cycle Timing Section to Timer Changes to Figure 28 ...................................................................... 35 Pulse-Width Modulation (PWM) Output Cycle Added About ADuCM3027/ADuCM3029 Silicon Anomalies Timing Section ................................................................................ 14 Section, Table 30, Table 31, and Table 32 Renumbered Change to Figure 13 Caption ........................................................ 14 Sequentially ..................................................................................... 36 Change to Table 19 ......................................................................... 15 Added Table 33 ............................................................................... 37 Changes to Figure 14 and Table 20 ............................................... 16 Changes to Ordering Guide .......................................................... 39 Changes to Figure 15 and Table 21 ............................................... 18 Changes to Figure 16 to Figure 19 ................................................ 20 12/2018Revision A: Initial Version Changes to Figure 20 and Figure 21 ............................................. 21 Rev. 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