Precision Analog Microcontroller, Tunable Optical Control Microcontroller Data Sheet ADuCM310 FEATURES External 16 MHz crystal option External clock source Analog input/output Memory 22-channel, 14-bit, 800 kSPS analog-to-digital 2 128 kB Flash/EE memories, 32 kB SRAM converter (ADC) In-circuit download, SW-DP-based debugging 10 external channels Software triggered in-circuit reprogrammability 1 on-chip die temperature monitor On-chip peripherals 6 current output digital-to-analog converter (IDAC) 2 UART, 2 I C and 2 SPI serial input/output monitor channels 28-pin general-purpose input/output (GPIO) port 3 power monitor channels 3 general-purpose timers 2 buffered reference output channels Wake-up (W/U) timer Fully differential and single-ended modes Watchdog timer (WDT) 0 V to 2.5 V analog input range 32-element programmable logic array (PLA) 6 low noise, 12-/14-bit IDAC outputs Vectored interrupt controller 1 250 mA, 1 200 mA, 2 100 mA, and 2 20 mA Interrupt on edge or level external pin inputs Semiconductor optical amplifier (SOA) IDAC pull-down 9 external interrupts to 3.0 V for fast current sink Power Eight 12-bit voltage output DACs (VDACs) Multiple supplies Channel 0 and Channel 1: 0 V to 3 V, 75 load 5 V for VDAC6 and VDAC7 Channel 2 and Channel 3: 5 V to 0 V, 500 load 3.3 V for digital and analog inputs/outputs Channel 4 and Channel 5: 0 V to 3 V, 300 load 1.8 V to 2.7 V for IDACs Channel 6: 0 V to 5 V, 500 load 5 V supply for IDAC3 and VDAC2/VDAC3 Channel 7: 0 V to 5 V, 100 load Package and temperature range 2.5 V, on-chip voltage reference 6 mm 6 mm, 112-ball CSP BGA package 2 buffered 2.5 V outputs Fully specified for 40C to +85C ambient operation Microcontroller Tools ARM Cortex-M3 processor, 32-bit RISC architecture QuickStart development system Serial wire port supports code download and debugging Full third party support Clocking options APPLICATIONS Trimmed on-chip oscillator (3%) Optical modulestunable laser modules 80 MHz phase-locked loop (PLL) FUNCTIONAL BLOCK DIAGRAM 32.786kHz AIN0 16MHz OSC RESET POR 14-BIT 80MHz PLL MUX BUF SAR ADC IOVDDx AIN9 PVDD IDACx ON-CHIP INTERNAL CHANNELS, 1.8V LDO AVDDx ARM IDACs, TEMPERATURE, CORTEX-M3 SUPPLIES PROCESSOR DGNDx PGND GPIO PORTS 2.5V BAND VREF 1.2 GAP V UART PORT REF 2 SPI PORT BUF VREF2.5A 2 2 I C PORT MEMORY EXT IRQs 256k FLASH GENERAL- BUF VREF2.5B 32k SRAM PURPOSE I/O PORTS VDAC0 VDAC 3 GP TIMER WD TIMER DMA W/U TIMER NVIC VDAC7 VDAC PWM ADuCM310 IDAC0 IDAC PLA SWDIO SERIAL 32 ELEMENTS WIRE SWCLK IDAC5 IDAC Figure 1. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20152019 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 13040-001ADuCM310 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Thermal Resistance .................................................................... 17 Applications ....................................................................................... 1 ESD Caution................................................................................ 17 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions ........................... 18 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 22 General Description ......................................................................... 3 Recommended Circuit and Component Values ........................ 25 Specif icat ions ..................................................................................... 4 Outline Dimensions ....................................................................... 27 Timing Specifications ................................................................ 12 Ordering Guide .......................................................................... 27 Absolute Maximum Ratings .......................................................... 17 REVISION HISTORY 2/2019Rev. B to Rev. C 11/2015Rev. 0 to Rev. A Changes to IDAC0 and IDAC1 Parameter, Table 1 ..................... 7 Change to Features Section .............................................................. 1 Added Allowed Power-Up Time for DV Supply Parameter, Changes to Specifications Section and Table 1 .............................. 4 DD Table 1 .............................................................................................. 10 Changes to Table 6 and Figure 5 ................................................... 15 Changes to Ordering Guide .......................................................... 27 Changes to Table 7 and Figure 6 ................................................... 16 Changes to Figure 7 ........................................................................ 18 7/2017Rev. A to Rev. B Change to Features ........................................................................... 1 5/2015Revision 0: Initial Version Change to General Description ...................................................... 3 Changes to Specifications Section and Table 1 ............................. 4 Added Endnote 1, Table 1 Renumbered Sequentially .............. 12 Rev. C Page 2 of 27