Dual-Channel Digital Isolator Data Sheet ADuM1210 FEATURES GENERAL DESCRIPTION 1 Narrow body, RoHS-compliant, 8-lead SOIC The ADuM1210 is a dual-channel, digital isolator based on Low power operation Analog Devices, Inc. , iCoupler technology. Combining high 5 V operation speed CMOS and monolithic transformer technology, this 1.1 mA per channel maximum 0 Mbps to 2 Mbps isolation component provides outstanding performance 3.7 mA per channel maximum 10 Mbps characteristics superior to alternatives such as optocoupler 3 V operation devices. 0.8 mA per channel maximum 0 Mbps to 2 Mbps By avoiding the use of LEDs and photodiodes, iCoupler devices 2.2 mA per channel maximum 10 Mbps remove the design difficulties commonly associated with opto- 3 V/5 V level translation couplers. The concerns of the typical optocoupler regarding High temperature operation: 105C uncertain current transfer ratios, nonlinear transfer functions, High data rate: dc to 10 Mbps (NRZ) and temperature and lifetime effects are eliminated with the Precise timing characteristics simple iCoupler digital interfaces and stable performance 3 ns maximum pulse width distortion characteristics. The need for external drivers and other discrete 3 ns maximum channel-to-channel matching components is eliminated with iCoupler products. Furthermore, High common-mode transient immunity: >25 kV/s iCoupler devices consume one-tenth to one-sixth the power of Safety and regulatory approvals optocouplers at comparable signal data rates. UL recognition The ADuM1210 isolator provides two independent isolation 2500 V rms for 1 minute per UL 1577 channels operable with the supply voltage on either side, CSA Component Acceptance Notice 5A ranging from 2.7 V to 5.5 V. This provides compatibility with VDE certificate of conformity lower voltage systems and enables voltage translation DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 functionality across the isolation barrier. In addition, the V = 560 V peak IORM ADuM1210 provides low pulse width distortion (<3 ns) and APPLICATIONS tight channel-to-channel matching (<3 ns). Unlike other opto- Size-critical multichannel isolation coupler alternatives, the ADuM1210 isolator has a patented SPI interface/data converter isolation refresh feature that ensures dc correctness in the absence of RS-232/RS-422/RS-485 transceiver isolation input logic transitions and during power-up/power-down Digital field bus isolation conditions. Furthermore, as an alternative to the ADuM1200 Gate drive interface dual-channel digital isolator that defaults to an output high condition, the ADuM1210 outputs default to a logic low state when input power is off. 1 Protected by U.S. Patents 5,952,849 6,873,065 7,075,329. FUNCTIONAL BLOCK DIAGRAM V 1 8 V DD1 DD2 ENCODE DECODE V 2 7 V IA OA 3 ENCODE DECODE 6 V V IB OB GND 4 5 GND 1 2 Figure 1. Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20052012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 05459-001ADuM1210 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Recommended Operating Conditions .................................... 10 Applications ....................................................................................... 1 Absolute Maximum Ratings ......................................................... 11 General Description ......................................................................... 1 ESD Caution................................................................................ 11 Functional Block Diagram .............................................................. 1 Pin Configuration and Function Descriptions ........................... 12 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 13 Specif icat ions ..................................................................................... 3 Applications Information .............................................................. 14 Electrical Characteristics5 V Operation................................ 3 PC Board Layout ........................................................................ 14 Electrical Characteristics3 V Operation................................ 5 Propagation Delay-Related Parameters ................................... 14 Electrical CharacteristicsMixed 5 V/3 V or 3 V/5 V DC Correctness and Magnetic Field Immunity ........................... 14 O p erat ion ....................................................................................... 7 Power Consumption .................................................................. 15 Package Characteristics ............................................................... 9 Insulation Lifetime ..................................................................... 15 Regulatory Information ............................................................... 9 Outline Dimensions ....................................................................... 17 Insulation and Safety-Related Specifications ............................ 9 Ordering Guide .......................................................................... 17 DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 Insulation Characteristics .......................................................... 10 REVISION HISTORY 3/07Rev. A to Rev. B 3/12Rev. C to Rev. D Changes to Table 1 ............................................................................. 3 Created Hyperlink for Safety and Regulatory Approvals Entry in Features Section ................................................................. 1 2/06Rev. 0 to Rev. A Change to PC Board Layout Section ............................................ 14 Updated Format .................................................................. Universal Added Note 1 ..................................................................................... 1 6/07Rev. B to Rev. C Changes to Absolute Maximum Ratings ..................................... 11 Updated VDE Certification Throughout ...................................... 1 Changes to DC Correctness and Magnetic Field Changes to Features, Applications, and Note 1 ............................ 1 Immunity Section ........................................................................... 14 Changes to DC Specifications in Table 1 ....................................... 3 Changes to DC Specifications in Table 2 ....................................... 5 7/05Revision 0: Initial Version Changes to DC Specifications in Table 3 ....................................... 7 Added Endnote 2 to Table 4 ............................................................ 9 Changes to Regulatory Information Section ................................ 9 Changes to Table 7 .......................................................................... 10 Added Table 10 ............................................................................... 11 Added Insulation Lifetime Section .............................................. 15 Rev. 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