3.0 kV RMS 5-Channel Digital Isolators Data Sheet ADuM150N/ADuM151N/ADuM152N FEATURES FUNCTIONAL BLOCK DIAGRAMS High common-mode transient immunity: 100 kV/s V V 1 ADuM150N 16 DD1 DD2 High robustness to radiated and conducted noise V V 2 ENCODE DECODE 15 IA OA Low propagation delay V V 3 ENCODE DECODE 14 IB OB 13 ns maximum for 5 V operation V 4 ENCODE DECODE 13 V IC OC 15 ns maximum for 1.8 V operation V 5 ENCODE DECODE 12 V ID OD 150 Mbps maximum guaranteed data rate V 6 ENCODE DECODE 11 V IE OE Safety and regulatory approvals (pending) NIC 7 10 NIC UL recognition: 3000 V rms for 1 minute per UL 1577 GND GND CSA Component Acceptance Notice 5A 8 9 1 2 VDE certificate of conformity Figure 1. ADuM150N Functional Block Diagram DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 V = 565 V peak IORM V 1 ADuM151N 16 V DD1 DD2 CQC certification per GB4943.1-2011 V 2 ENCODE DECODE 15 V IA OA Low dynamic power consumption V 3 14 V IB ENCODE DECODE OB 1.8 V to 5 V level translation V 4 13 V ENCODE DECODE IC OC High temperature operation: 125C V V 5 ENCODE DECODE 12 ID OD Fail-safe high or low options V V 6 DECODE ENCODE 11 OE IE 16-lead, RoHS compliant, narrow-body SOIC package NIC NIC 7 10 APPLICATIONS GND 8 9 GND 1 2 General-purpose multichannel isolation Figure 2. ADuM151N Functional Block Diagram Serial peripheral interface (SPI)/data converter isolation Industrial field bus isolation V V 1 ADuM152N 16 DD1 DD2 GENERAL DESCRIPTION V V 2 ENCODE DECODE 15 IA OA 1 The ADuM150N/ADuM151N/ADuM152N are 5-channel V V 3 ENCODE DECODE 14 IB OB digital isolators based on Analog Devices, Inc., iCoupler V 4 ENCODE DECODE 13 V IC OC technology. Combining high speed, complementary metal-oxide V 5 DECODE ENCODE 12 V OD ID semiconductor (CMOS) and monolithic air core transformer V 6 DECODE ENCODE 11 V OE IE technology, these isolation components provide outstanding NIC 7 10 NIC performance characteristics superior to alternatives such as GND GND 8 9 1 2 optocoupler devices and other integrated couplers. The maximum propagation delay is 13 ns with a pulse width Figure 3. ADuM152N Functional Block Diagram distortion of less than 4.5 ns at 5 V operation. Channel to channel matching of propagation delay is tight at 4.0 ns maximum. The ADuM150N/ADuM151N/ADuM152N data channels are independent and are available in a variety of configurations Unlike other optocoupler alternatives, dc correctness is ensured with a withstand voltage rating of 3.0 kV rms (see the Ordering in the absence of input logic transitions. Two different fail-safe Guide). The devices operate with the supply voltage on either options are available by which the outputs transition to a predeter- side ranging from 1.7 V to 5.5 V, providing compatibility with mined state when the input power supply is not applied. lower voltage systems as well as enabling voltage translation functionality across the isolation barrier. 1 Protected by U.S. Patents 5,952,849 6,873,065 6,903,578 and 7,075,329. Other patents are pending. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 2016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 14531-003 14531-002 14531-001ADuM150N/ADuM151N/ADuM152N Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Recommended Operating Conditions .................................... 12 Applications ....................................................................................... 1 Absolute Maximum Ratings ......................................................... 13 General Description ......................................................................... 1 ESD Caution................................................................................ 13 Functional Block Diagrams ............................................................. 1 Pin Configurations and Function Descriptions ......................... 14 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 17 Specifications ..................................................................................... 3 Theory of Operation ...................................................................... 19 Electrical Characteristics5 V Operation................................ 3 Applications Information .............................................................. 20 Electrical Characteristics3.3 V Operation ............................ 5 PCB Layout ................................................................................. 20 Electrical Characteristics2.5 V Operation ............................ 7 Propagation Delay Related Parameters ................................... 20 Electrical Characteristics1.8 V Operation ............................ 9 Jitter Measurement ..................................................................... 20 Insulation and Safety Related Specifications .......................... 11 Insulation Lifetime ..................................................................... 20 Package Characteristics ............................................................. 11 Outline Dimensions ....................................................................... 22 Regulatory Information ............................................................. 11 Ordering Guide .......................................................................... 22 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics ............................................................................ 12 REVISION HISTORY 8/2016Revision 0: Initial Version Rev. 0 Page 2 of 22