5 kV, 7-Channel, SPIsolator Digital Isolators for SPI Data Sheet ADuM4151/ADuM4152/ADuM4153 FEATURES FUNCTIONAL BLOCK DIAGRAMS Supports up to 17 MHz SPI clock speed V 1 20 V DD1 DD2 ADuM4151 4 high speed, low propagation delay, SPI signal isolation GND GND 2 19 1 2 ENCODE DECODE channels MCLK 3 18 SCLK ENCODE DECODE Three 250 kbps data channels MO 4 17 SI 20-lead SOIC IC package with 8.3 mm creepage DECODE ENCODE High temperature operation: 125C MI 5 16 SO ENCODE DECODE High common-mode transient immunity: >25 kV/s SSS MSS 6 15 Safety and regulatory approvals V 14 V 7 IA OA UL recognition per UL 1577 CONTROL CONTROL V 8 13 V IB OB BLOCK BLOCK 5000 V rms for 1 minute SOIC long package V V 9 12 OC IC CSA Component Acceptance Notice 5A GND GND 10 11 1 2 VDE certificate of conformity DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 Figure 1. ADuM4151 Functional Block Diagram Maximum working insulation voltage (V ): 849 V peak IORM V 1 20 V DD1 DD2 ADuM4152 APPLICATIONS GND 2 19 GND 1 2 ENCODE DECODE Industrial programmable logic controllers (PLCs) MCLK 3 18 SCLK ENCODE DECODE Sensor isolation MO 4 17 SI DECODE ENCODE GENERAL DESCRIPTION SO MI 5 16 ENCODE DECODE 1 The ADuM4151/ADuM4152/ADuM4153 are 7-channel, MSS 6 15 SSS SPIsolator digital isolators optimized for isolated serial peripheral V 7 14 V IA OA interfaces (SPIs). Based on the Analog Devices, Inc., iCoupler CONTROL CONTROL V 8 13 V OB IB BLOCK BLOCK chip scale transformer technology, the low propagation delay in V V OC 9 12 IC SS the CLK, MO/SI, MI/SO, and SPI bus signals supports SPI GND 10 11 GND 2 1 clock rates of up to 17 MHz. These channels operate with 14 ns propagation delay and 1 ns jitter to optimize timing for SPI. Figure 2. ADuM4152 Functional Block Diagram The ADuM4151/ADuM4152/ADuM4153 isolators also provide V 1 20 V DD1 DD2 ADuM4153 three additional independent low data rate isolation channels in GND GND 2 19 1 2 three different channel direction combinations. Data in the slow ENCODE DECODE MCLK 3 18 SCLK channels is sampled and serialized for a 250 kbps data rate with ENCODE DECODE up to 2.5 s of jitter in the low speed channels. MO 4 17 SI DECODE ENCODE MI 5 16 SO ENCODE DECODE MSS 15 SSS 6 V 7 14 V OA IA CONTROL CONTROL V 8 13 V OB IB BLOCK BLOCK V V 9 12 OC IC GND 11 GND 10 1 2 Figure 3. ADuM4153 Functional Block Diagram 1 Protected by U.S. Patents 5,952,849 6,873,065 6,262,600 and 7,075,329. Other patents are pending. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20142017 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 12370-003 12370-002 12370-001ADuM4151/ADuM4152/ADuM4153 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Recommended Operating Conditions .................................... 12 Applications ....................................................................................... 1 Absolute Maximum Ratings ......................................................... 13 General Description ......................................................................... 1 ESD Caution................................................................................ 13 Functional Block Diagrams ............................................................. 1 Pin Configurations and Function Descriptions ......................... 14 Revision History ............................................................................... 2 Typical Performance Characteristics ........................................... 17 Specifications ..................................................................................... 3 Applications Information .............................................................. 18 Electrical Characteristics5 V Operation................................ 3 Introduction ................................................................................ 18 Electrical Characteristics3.3 V Operation ............................ 5 Printed Circuit Board (PCB) Layout ....................................... 19 Electrical CharacteristicsMixed 5 V/3.3 V Operation ........ 7 Propagation Delay Related Parameters ................................... 19 Electrical CharacteristicsMixed 3.3 V/5 V Operation ........ 9 DC Correctness and Magnetic Field Immunity ..................... 19 Package Characteristics ............................................................. 10 Power Consumption .................................................................. 20 Regulatory Information ............................................................. 11 Insulation Lifetime ..................................................................... 20 Insulation and Safety Related Specifications .......................... 11 Outline Dimensions ....................................................................... 22 DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 Ordering Guide .......................................................................... 22 Insulation Characteristics .......................................................... 12 REVISION HISTORY 7/2017Rev. A to Rev. B Changes to Logic High Output Voltages Parameter, Table 6 ...... 6 Changes to Logic High Output Voltages Parameter, Table 9 ...... 8 Changes to Logic High Output Voltages Parameter, Table 12 ... 10 Changes to Table 20, Pin 3, Direction Column .......................... 14 Changes to Table 21, Pin 3, Direction Column .......................... 15 Change to Table 22, Pin 3, Direction Column ............................ 16 3/2015Rev. 0 to Rev. A Changes to Features Section............................................................ 1 Changes to Table 2 ............................................................................ 3 Changes to Table 5 ............................................................................ 5 Changes to Table 8 ............................................................................ 7 Changes to Table 11 .......................................................................... 9 Changes to Table 14 ........................................................................ 11 Changes to Table 16 ........................................................................ 12 Changes to High Speed Channels Section .................................. 18 10/2014Revision 0: Initial Version Rev. B Page 2 of 22