Isolated, Half Bridge Gate Drivers with Adjustable Dead Time, 4 A Output Data Sheet ADuM4221/ADuM4221-1/ADuM4221-2 FEATURES GENERAL DESCRIPTION 4 A peak current (<2 RDSON x) The ADuM4221/ADuM4221-1/ADuM4221-2 are 4 A isolated, 2.5 V to 6.5 V logic input voltage half bridge gate drivers that employ the Analog Devices, Inc., 4.5 V to 35 V output supply voltage iCoupler technology to provide independent and isolated UVLO VDD1 positive going threshold: 2.5 V maximum high-side and low-side outputs. The ADuM4221/ADuM4221-1/ Multiple UVLO options for VDDA and VDDB positive going ADuM4221-2 provide 5700 V rms isolation in an increased threshold creepage wide body, 16-lead SOIC IC. Combining high speed Grade A: 4.5 V maximum CMOS and monolithic transformer technology, these isolation Grade B: 7.5 V maximum components provide outstanding performance characteristics Grade C: 11.6 V maximum superior to the alternatives, such as the combination of pulse Precise timing characteristics transformers and gate drivers. 44 ns maximum propagation delay Adjustable dead time and dual input (ADuM4221) The isolators operate with a logic input voltage ranging from Adjustable dead time and single input (ADuM4221-1) 2.5 V to 6.5 V, providing compatibility with lower voltage No dead time control and dual input (ADuM4221-2) systems. In comparison to gate drivers employing high voltage CMOS input logic levels level translation methodologies, the ADuM4221/ADuM4221-1/ High common-mode transient immunity: 150 kV/s ADuM4221-2 offer the benefit of true, galvanic isolation High junction temperature operation: 125C between the input and each output. Default low output Safety and regulatory approvals (pending) The ADuM4221/ADuM4221-1 each have built in overlap UL recognition per UL 1577 protection and allow dead time adjustment. A single resistor 5700 V rms for 1 minute duration between the dead time pin (DT) and the GND pin sets the 1 CSA Component Acceptance Notice 5A dead time on the secondary side between the high-side and VDE certificate of conformity the low-side outputs. The ADuM4221-2 does not have overlap DIN V VDE V 0884-11: VIORM = 849 V peak protection nor dead time control. Increased creepage wide body, 16-lead SOIC IC An internal thermal shutdown (TSD) sets outputs low if the internal temperature on the ADuM4221/ADuM4221-1/ APPLICATIONS ADuM4221-2 exceeds the TSD temperature. As a result, Switching power supplies the ADuM4221/ADuM4221-1/ADuM4221-2 provide reliable Isolated IGBT/MOSFET gate drives Industrial inverters control over the switching characteristics of the insulated gate Gallium nitride (GaN)/silicon carbide (SiC) compatible bipolar transistor (IGBT)/metal-oxide semiconductor field effect transistor (MOSFET) configurations over a wide range of positive or negative switching voltages. 1 Protected by U.S. Patents 5,952,849 6,873,065 7,075,239. Other patents pending. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 2020 Analog Devices, Inc. All rights reserved. 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Technical Support www.analog.com ADuM4221/ADuM4221-1/ADuM4221-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics .......................................... 12 Applications ...................................................................................... 1 Theory of Operation ...................................................................... 16 General Description ......................................................................... 1 Applications Information ............................................................. 17 Revision History ............................................................................... 2 PCB Layout ................................................................................. 17 Functional Block Diagrams ............................................................. 3 Propagation Delay-Related Parameters .................................. 17 Specifications .................................................................................... 4 Peak Current Rating .................................................................. 17 Electrical Characteristics ............................................................. 4 Protection Features .................................................................... 17 Package Characteristics ............................................................... 5 Output Load Characteristics .................................................... 18 Regulatory Information ............................................................... 6 Adjustable Dead Time Control ................................................ 18 Insulation and Safety Related Specifications ............................ 6 Bootstrapped, Half Bridge Operation ..................................... 20 DIN V VDE V 0884-11 (VDE V 0884-11) Insulation Power Dissipation ...................................................................... 21 Characteristics .............................................................................. 7 DC Correctness and Magnetic Field Immunity .................... 21 Recommended Operating Conditions ...................................... 7 Insulation Lifetime ..................................................................... 22 Absolute Maximum Ratings ........................................................... 8 Outline Dimensions ....................................................................... 23 Thermal Resistance ...................................................................... 8 Ordering Guide .......................................................................... 23 ESD Caution.................................................................................. 8 Pin Configurations and Function Descriptions ........................... 9 REVISION HISTORY 9/2020Rev. A to Rev. B 8/2020Rev. 0 to Rev. A Add ADuM4221-2 ............................................................. Universal Add ADuM4221-1 ............................................................. Universal Moved Functional Block Diagrams Section ................................. 3 Added Figure 2 Renumbered Sequentially ................................... 1 Added Figure 3 Renumbered Sequentially .................................. 3 Changes to Input Supply Current, Quiescent Parameter, Changes to Input Supply Current, Quiescent Parameter, Table 1 ................................................................................................. 3 Table 1 ................................................................................................ 4 Changes to Table 7 ............................................................................ 7 Changes to Note 2, Table 7 ............................................................. 8 Changes to Figure 4 Caption, Table 10 Caption, and Table 11 Added Figure 7, Table 14 Renumbered Sequentially, and Caption......................................................................................................... 8 Table 15 ............................................................................................ 11 Add Figure 5, Table 12, and Table 13 Renumbered Sequentially ... 9 Changes to Figure 8 and Figure 9 ................................................ 12 Added Figure 10 ............................................................................. 10 Added Figure 13 ............................................................................. 12 Changes to Figure 8 Caption, Figure 9 Caption, and Figure 11 Added Figure 14 ............................................................................. 13 Caption....................................................................................................... 10 Changes to Figure 31 Caption ...................................................... 16 Changes to Figure 12 Captions ............................................................. 11 Changes to Figure 32 Caption ...................................................... 17 Changes to Figure 28 and TSD Section ............................................... 15 Changes to Power Dissipation Section ........................................ 21 Changes to Figure 30 and Adjustable Dead Time Control Changes to Ordering Guide .......................................................... 24 Section ....................................................................................................... 16 Added Figure 33 ....................................................................................... 17 Changes to Bootstrapped, Half Bridge Operation Section and Figure 34 Caption ........................................................................... 18 7/2020Revision 0: Initial Version Rev. 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