Isolated Half-Bridge Gate Driver with Integrated Isolated High-Side Supply Data Sheet ADuM6132 FEATURES GENERAL DESCRIPTION 1 isoPower integrated isolated high-side supply The ADuM6132 is an isolated half-bridge gate driver that 275 mW isolated dc-to-dc converter employs the Analog Devices, Inc., iCoupler technology to 200 mA output sink current, 200 mA output source current provide an isolated high-side driver with an integrated 275 mW High common-mode transient immunity: >50 kV/s high-side supply. This supply, provided by an internal isolated Wide-body 16-lead SOIC package dc-to-dc converter, powers not only the ADuM6132 high-side Safety and regulatory approvals output but also any external buffer circuitry that is commonly UL recognition used with the ADuM6132. This functionality eliminates the 3750 V rms for 1 minute per UL 1577 cost, space, and performance issues associated with external CSA Component Acceptance Notice 5A supply configurations such as a bootstrap circuit. CSA/IEC 60950-1, 400 V rms The architecture of the ADuM6132 isolates the high-side VDE certificate of conformity (pending) channel and the high-side power from the control and low- DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 side interface circuitry. Care has been taken to ensure close V = 560 V peak IORM matching between the high-side and low-side driver timing characteristics to reduce the need for a dead time margin. APPLICATIONS In comparison to gate drivers that employ high voltage level MOSFET/IGBT gate drivers translation methodologies, the ADuM6132 offers the benefit Motor drives of true, galvanic isolation. The differential voltage between Solar panel inverters high-side and low-side channels can be as high as 800 V with Power supplies good insulation lifetime (see Table 12). isoPower uses high frequency switching elements to transfer power through its transformer. Special care must be taken during printed circuit board (PCB) layout to meet emissions standards. Refer to the AN-0971 Application Note for information about board layout considerations. FUNCTIONAL BLOCK DIAGRAM V 1 16 V ISOLATED DD ISO DC-TO-DC 2 CONVERTER GND 15 GND ISO V 3 14 GND DDL A 4 V ENCODE 13 V IA DDA V 5 12 V IB OA V 6 11 NC OB V 7 10 DDB NC GND GND 8 9 ISO ADuM6132 Figure 1. 1 Protected by U.S. Patents 5,952,849 6,873,065 6,903,578 7,075,329 and other pending patents. Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20082014 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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LEVEL- SHIFT DECODE AND LEVEL-SHIFT 07393-001ADuM6132 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................6 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions ..............................7 General Description ......................................................................... 1 Typical Performance Characteristics ..............................................8 Functional Block Diagram .............................................................. 1 Terminology .................................................................................... 10 Revision History ............................................................................... 2 Applications Information .............................................................. 11 Specifications ..................................................................................... 3 Typical Application Usage ......................................................... 11 Electrical Characteristics ............................................................. 3 PCB Layout ................................................................................. 11 Package Characteristics ............................................................... 4 Thermal Analysis ....................................................................... 12 Regulatory Information ............................................................... 4 Undervoltage Lockout ............................................................... 12 Insulation and Safety-Related Specifications ............................ 4 Propagation Delay-Related Parameters ................................... 13 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Magnetic Field Immunity .......................................................... 13 Characteristics .............................................................................. 5 Insulation Lifetime ..................................................................... 14 Recommended Operating Conditions ...................................... 5 Outline Dimensions ....................................................................... 15 Absolute Maximum Ratings ............................................................ 6 Ordering Guide .......................................................................... 15 REVISION HISTORY 4/14Rev. A to Rev. B Change to Table 3 ............................................................................. 4 6/12Rev. 0 to Rev. A Created Hyperlink for Safety and Regulatory Approvals Entry in Features Section ................................................................. 1 Changes to Regulatory Information Section and Table 3 ........... 4 Change to PCB Layout Section ..................................................... 12 Updated Outline Dimensions ....................................................... 15 7/08Revision 0: Initial Version Rev. B Page 2 of 16