3-Axis, 2 g/4 g/8 g/16 g Ultralow Power Digital Accelerometer ADXL346 FEATURES GENERAL DESCRIPTION Ultralow power: as low as 23 A in measurement mode and The ADXL346 is a small, thin, ultralow power, 3-axis accelerometer 0.2 A in standby mode at V = 2.6 V (typical) S with high resolution (13-bit) measurement at up to 16 g. Digital Power consumption scales automatically with bandwidth output data is formatted as 16-bit twos complement and is acces- 2 User-selectable resolution sible through either an SPI (3- or 4-wire) or I C digital interface. Fixed 10-bit resolution The ADXL346 is well suited for mobile device applications. It Full resolution, where resolution increases with g range, measures the static acceleration of gravity in tilt-sensing appli- up to 13-bit resolution at 16 g (maintaining 4 mg/LSB cations, as well as dynamic acceleration resulting from motion scale factor in all g ranges) or shock. Its high resolution (4 mg/LSB) enables measurement Patent pending, embedded memory management system of inclination changes of less than 1.0. with FIFO technology minimizes host processor load Several special sensing functions are provided. Activity and Single-tap/double-tap detection inactivity sensing detect the presence or lack of motion by Activity/inactivity monitoring comparing the acceleration on any axis with user-set thresholds. Free-fall detection Tap sensing detects single and double taps in any direction. Free- Concurrent four- and six-position orientation detection fall sensing detects if the device is falling. Orientation detection Supply and I/O voltage range: 1.7 V to 2.75 V 2 is capable of concurrent four- and six-position sensing and a SPI (3- and 4-wire) and I C digital interfaces user-selectable interrupt on orientation change for 2D or 3D Flexible interrupt modes mappable to either interrupt pin applications. These functions can be mapped individually to Measurement ranges selectable via serial command either of two interrupt output pins. An integrated, patent pending Bandwidth selectable via serial command memory management system with 32-level first in, first out (FIFO) Wide temperature range (40C to +85C) buffer can be used to store data to minimize host processor activity 10,000 g shock survival and lower overall system power consumption. Pb free/RoHS compliant Small and thin: 3 mm 3 mm 0.95 mm LGA package Low power modes enable intelligent motion-based power management with threshold sensing and active acceleration APPLICATIONS measurement at extremely low power dissipation. Handsets The ADXL346 is supplied in a small, thin, 3 mm 3 mm Medical instrumentation 0.95 mm, 16-lead, plastic package. Gaming and pointing devices Industrial instrumentation Personal navigation devices Hard disk drive (HDD) protection FUNCTIONAL BLOCK DIAGRAM V V S DD I/O ADXL346 POWER MANAGEMENT INT1 CONTROL SENSE AND ADC DIGITAL ELECTRONICS INTERRUPT FILTER 3-AXIS LOGIC INT2 SENSOR SDA/SDI/SDIO 32-LEVEL SERIAL I/O SDO/ALT FIFO ADDRESS SCL/SCLK GND CS Figure 1. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 20102011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08167-001ADXL346 TABLE OF CONTENTS Register Definitions ................................................................... 23 Features .............................................................................................. 1 Applications Information .............................................................. 29 Applications....................................................................................... 1 Power Supply Decoupling ......................................................... 29 General Description ......................................................................... 1 Mechanical Considerations for Mounting.............................. 29 Functional Block Diagram .............................................................. 1 Tap Detection.............................................................................. 29 Revision History ............................................................................... 2 Improved Tap Detection............................................................ 30 Specifications..................................................................................... 3 Tap Sign ....................................................................................... 30 Absolute Maximum Ratings............................................................ 5 Threshold .................................................................................... 31 Thermal Resistance ...................................................................... 5 Link Mode ................................................................................... 31 Package Information .................................................................... 5 Sleep Mode vs. Low Power Mode............................................. 31 ESD Caution.................................................................................. 5 Offset Calibration....................................................................... 31 Pin Configuration and Function Descriptions............................. 6 Using Self-Test ............................................................................ 32 Typical Performance Characteristics ............................................. 7 Orientation Sensing ................................................................... 32 Theory of Operation ...................................................................... 12 Data Formatting of Upper Data Rates..................................... 34 Power Sequencing ...................................................................... 12 Noise Performance..................................................................... 35 Power Savings ............................................................................. 13 Operation at Voltages Other Than 2.6 V ................................ 35 Serial Communications ................................................................. 14 Offset Performance at Lowest Data Rates............................... 36 SPI................................................................................................. 14 2 Axes of Acceleration Sensitivity ............................................... 37 I C ................................................................................................. 17 Layout and Design Recommendations ................................... 38 Interrupts..................................................................................... 19 Outline Dimensions....................................................................... 39 FIFO ............................................................................................. 20 Ordering Guide .......................................................................... 39 Self-Test........................................................................................ 21 Register Map.................................................................................... 22 REVISION HISTORY 5/11Rev. A to Rev. B Added Endnote 7.............................................................................. 3 Added Preventing Bus Traffic Errors Section............................. 14 Changes to Figure 37, Figure 38, Figure 39................................. 15 Changes to Table 12........................................................................ 18 Changes to Using Self-Test Section.............................................. 32 Changes to Axes of Acceleration Sensitivity Section................. 37 11/10Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 39 5/10Revision 0: Initial Version Rev. B Page 2 of 40