Low Noise, Low Drift, Low Power, 3-Axis MEMS Accelerometers Data Sheet ADXL354/ADXL355 FEATURES FUNCTIONAL BLOCK DIAGRAMS V V 1P8ANA 1P8DIG RANGE Hermetic package offers excellent long-term stability 0 g offset vs. temperature (all axes): 0.15 mg/C maximum LDO POWER V SUPPLY LDO Ultralow noise density (all axes): 20 g/Hz (ADXL354) MANAGEMENT X Low power, V (LDO enabled) OUT SUPPLY ANALOG ADXL354 in measurement mode: 150 A ST1 Y OUT FILTER 3-AXIS ADXL355 in measurement mode: 200 A ST2 SENSOR OUT CONTROL LOGIC ADXL354/ADXL355 in standby mode: 21 A STBY TEMP TEMP ADXL354 ADXL354 has user adjustable analog output bandwidth SENSOR V DDIO ADXL355 digital output features 2 V V Digital serial peripheral interface (SPI)/I C interfaces SSIO SS 20-bit analog-to-digital converter (ADC) Figure 1. ADXL354 Functional Block Diagram Data interpolation routine for synchronous sampling V V V 1P8ANA 1P8DIG DDIO Programmable high- and low-pass digital filters POWER LDO MANAGEMENT Electromechanical self test V LDO SUPPLY ADXL355 Integrated temperature sensor ADC INT1 CONTROL Voltage range options INT2 DIGITAL ADC ANALOG LOGIC FILTER FILTER DRDY V with internal regulators: 2.25 V to 3.6 V SUPPLY 3-AXIS ADC CS/SCL SENSOR SCLK/V V , V with internal low dropout regulator (LDO) SSIO 1P8ANA 1P8DIG TEMP SERIAL ADC FIFO MOSI/SDA SENSOR I/O bypassed: 1.8 V typical 10% MISO/ASEL Operating temperature range: 40C to +125C V V SSIO SS 14-terminal, 6 mm 6 mm 2.1 mm, LCC package, Figure 2. ADXL355 Functional Block Diagram 0.26 grams APPLICATIONS Inertial measurement units (IMUs)/altitude and heading reference systems (AHRSs) Platform stabilization systems Structural health monitoring Seismic imaging Tilt sensing Robotics Condition monitoring GENERAL DESCRIPTION The analog output ADXL354 and the digital output ADXL355 Highly integrated in a compact form factor, the low power are low noise density, low 0 g offset drift, low power, 3-axis ADXL355 is ideal in an Internet of Things (IoT) sensor node accelerometers with selectable measurement ranges. The and other wireless product designs. ADXL354B supports the 2 g and 4 g ranges, the ADXL354C The ADXL355 multifunction pin names may be referenced by supports the 2 g and 8 g ranges, and the ADXL355 supports 2 their relevant function only for either the SPI or I C interfaces. the 2.048 g, 4.096 g, and 8.192 g ranges. The ADXL354/ ADXL355 offer industry leading noise, minimal offset drift over temperature, and long term stability enabling precision applications with minimal calibration. 1 Protected by U.S. Patents 8,472,270 9,041,462 8,665,627 8,917,099 6,892,576 9,297,825 and 7,956,621. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20162018 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 14205-002 14205-001ADXL354/ADXL355 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 NVM BUSY ............................................................................... 28 Applications ....................................................................................... 1 External Synchronization and Interpolation .......................... 29 Functional Block Diagrams ............................................................. 1 ADXL355 Register Map ................................................................. 31 General Description ......................................................................... 1 Register Definitions........................................................................ 32 Revision History ............................................................................... 2 Analog Devices ID Register ...................................................... 32 Specif icat ions ..................................................................................... 3 Analog Devices MEMS ID Register ......................................... 32 Analog Output for the ADXL354 ............................................... 3 Device ID Register ..................................................................... 32 Digital Output for the ADXL355 ............................................... 4 Product Revision ID Register ................................................... 32 SPI Digital Interface Characteristics for the ADXL355 .......... 5 Status Register ............................................................................. 32 2 I C Digital Interface Characteristics for the ADXL355 ........... 6 FIFO Entries Register ................................................................ 33 Absolute Maximum Ratings ............................................................ 8 Temperature Data Registers ...................................................... 33 Thermal Resistance ...................................................................... 8 X-Axis Data Registers ................................................................ 33 ESD Caution .................................................................................. 8 Y-Axis Data Registers ................................................................ 34 Pin Configurations and Function Descriptions ........................... 9 Z-Axis Data Registers ................................................................ 34 Typical Performance Characteristics ........................................... 11 FIFO Access Register ................................................................. 35 Root Allan Variance (RAV) ADXL355 Characteristics ......... 19 X-Axis Offset Trim Registers .................................................... 35 Theory of Operation ...................................................................... 20 Y-Axis Offset Trim Registers .................................................... 35 Analog Output ............................................................................ 20 Z-Axis Offset Trim Registers .................................................... 36 Digital Output ............................................................................. 21 Activity Enable Register ............................................................ 36 Axes of Acceleration Sensitivity ............................................... 21 Activity Threshold Registers ..................................................... 36 Power Sequencing ...................................................................... 22 Activity Count Register ............................................................. 36 Power Supply Description ......................................................... 22 Filter Settings Register ............................................................... 37 Overrange Protection ................................................................. 22 FIFO Samples Register .............................................................. 37 Self Test ........................................................................................ 22 Interrupt Pin (INTx) Function Map Register......................... 37 Filter ............................................................................................. 23 Data Synchronization ................................................................ 38 2 Serial Communications ................................................................. 25 I C Speed, Interrupt Polarity, and Range Register ................. 38 SPI Protocol ................................................................................. 25 Power Control Register ............................................................. 38 2 I C Protocol ................................................................................. 26 Self Test Register ......................................................................... 39 Reading Acceleration or Temperature Data from the Interface Reset Register .............................................................................. 39 ....................................................................................................... 26 Recommended Soldering Profile ................................................. 40 FIFO ................................................................................................. 27 PCB Footprint Pattern ............................................................... 41 Interrupts ......................................................................................... 28 Packaging and Ordering Information ......................................... 42 DATA RDY ................................................................................. 28 Outline Dimensions ................................................................... 42 DRDY Pin .................................................................................... 28 Branding Information ................................................................ 42 FIFO FULL ................................................................................. 28 Ordering Guide .......................................................................... 42 FIFO OVR .................................................................................. 28 Activity ......................................................................................... 28 REVISION HISTORY 4/2018Rev. 0 to Rev. 8/2016Revision 0: Initial Version Added Vibration Parameter, Table 5 .............................................. 8 Changes to Overrange Protection Section .................................. 22 Rev. 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