QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1185 DUAL PHASE/DUAL OUTPUT SYNCHRONOUS BUCK CONVERTER LTC3850EUF DESCRIPTION Demonstration circuit 1185 is a dual phase/dual output LTC3850EUF is a 4mm X 4mm 28-lead QFN with an ex- synchronous buck converter featuring the LTC3850EUF. posed ground pad. The demo board comes in two versions. The output The main features of the board include an internal 5V voltages for version -A are 2.0V/10A and 1.8V/10A and linear regulator for bias, RUN pins for each output, an the output voltages for version -B are 1.5V/15A and EXTVCC pin and a PGOOD signal. The board can be con- 1.2V/15A. The input voltage range is 6.5V to 14V for figured for either CCM (original setting), Burst Mode, or both versions. For applications that have a 5V +/- 0.5V pulse skip operation with the MODE jumper. The board input, the board has an optional resistor to tie the also has optional resistors for single output / dual phase INTVCC pin to the VIN pin. operation, rail tracking, DCR sensing and synchroniza- The demo board uses a high density, two sided drop-in tion to an external clock. layout. The power components, excluding the bulk out- Design files for this circuit board are available. Call put and input capacitors, fit within a 1.35 X 0.75 area the LTC factory. on the top layer. The control circuit resides in a 0.60 X 0.75 area on the bottom layer. The package style for the Table 1. Performance Summary (T = 25C) A PARAMETER CONDITION VALUE Minimum Input Voltage 6.5V Maximum Input Voltage 14V Version -A Output Voltage V I = 0A to 10A 2.0V 2% OUT1 OUT1 Output Voltage V I = 0A to 10A 1.8V 2% OUT2 OUT2 Nominal Switching Frequency 500kHz Full Load Efficiency V = 2.0V, I = 10A , V = 12V 88.0% OUT1 OUT1 IN (see Figure 3 for efficiency curves) V = 1.8V, I = 10A , V = 12V 87.0% OUT2 OUT2 IN Version -B Output Voltage V I = 0A to 15A 1.5V 2% OUT1 OUT1 Output Voltage V I = 0A to 15A 1.2V 2% OUT2 OUT2 Nominal Switching Frequency 400kHz Full Load Efficiency V = 1.5V, I = 15A , V = 12V 87.4% OUT1 OUT1 IN (see Figure 4 for efficiency curves) V = 1.2V, I = 15A , V = 12V 85.3% OUT2 OUT2 IN 1 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1185 DUAL PHASE/DUAL OUTPUT SYNCHRONOUS BUCK CONVERTER QUICK START PROCEDURE Demonstration circuit 1185 is easy to set up to evaluate Check for the proper output voltages. the performance of the LTC3850EUF. Refer to Figure 1 Version A: for the proper measurement equipment setup and follow Vout1 = 1.960V to 2.040V the procedure below: Vout2 = 1.764V to 1.836V NOTE: When measuring the output or input voltage rip- Version B: ple, care must be taken to avoid a long ground lead on Vout1 = 1.470V to 1.530V the oscilloscope probe. See Figure 2 for the proper Vout2 = 1.176V to 1.224V scope probe technique. Short, stiff leads need to be sol- dered to the (+) and (-) terminals of an output capacitor. The probes ground ring needs to touch the (-) lead and Once the proper output voltages are established, adjust the probe tip needs to touch the (+) lead. the loads within the operating range and observe the output voltage regulation, ripple voltage, efficiency and Place jumpers in the following positions: other parameters. JP1 RUN1 ON JP2 RUN2 ON NOTE: Do not apply load across the VOSn+ and VOSn- JP3 MODE CCM turrets. These turrets are only intended to Kelvin sense the output voltage across COUT1 and COUT4. Heavy load currents may damage the output voltage sense With power off, connect the input power supply to VIN traces. and GND. Turn on the power at the input. NOTE: Make sure that the input voltage does not exceed 15V. SINGLE OUTPUT / DUAL PHASE OPERATION A single output / dual phase converter may be preferred 3. Tie VFB1 to VFB2 by stuffing 0W at R50. for high output current applications. The benefits of sin- 4. Tie TRK/SS1 to TRK/SS2 by stuffing 0W at gle output / dual phase operation is lower ripple current R52. through the input and output capacitors, improved load 5. Tie RUN1 to RUN2 by stuffing 0W at R55. step response and simplified thermal design. To imple- ment single output / dual phase operation, make the fol- 6. Remove the redundant ITH compensation lowing modifications: network and VFB divider. 1. Tie VOUT1 to VOUT2 by tying together the ex- posed copper pads near J3 and J5 at the edge of the board. Use a piece of heavy copper foil. 2. Tie ITH1 to ITH2 by stuffing 0W at R49. 2