QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1249 POE TO 3.3V 3.0A ISOLATED LTC4267CDHC-3 DESCRIPTION Demonstration circuit 1249 is a PoE to 3.3V 3.0A the LTC4267-3 to charge load capacitors and in- Isolated Converter featuring the LTC4267CDHC-3. terface with legacy PoE systems. The board provides a complete IEEE 802.3af power device (PD) interface and isolated 3.3V The LTC4267-3 combines the above features with power supply solution for use in Power-over- a current mode switching controller designed for Ethernet (PoE) applications in a very small printed driving a N-channel MOSFET. It features pro- circuit board footprint. grammable slope compensation, soft-start, and constant frequency operation, minimizing electrical The LTC4267-3 integrates the 25k signature re- noise even with light loads. sistor, classification current source, thermal over- load protection, signature disable and power good Design files for this circuit board are available. signal along with an undervoltage lockout opti- Call the LTC factory. mized for use with the IEEE required diode bridge. The precision dual level input current limit allows Table 1. Performance Summary (T = 25C) A PARAMETER CONDITION VALUE Turn-on Voltage Input from PSE -37V Maximum Turn-off Voltage Input from PSE, PD switch turns off -31V Minimum operating voltage I = 3A -33V OUT Power Converter Input operating range V = 3.3V, I = 0 to 3.0A -37V to -57V OUT OUT Maximum Input Current Input from PSE, PD high level current limit 375mA, typical Maximum Output Current V = 3.3V 3.0A OUT Output Voltage V = 48VDC from PSE, I = 3.0A 3.3V, typical IN OUT Line (0% to 100% full load) 2% Output Regulation Load (0% to 100% of rated full load) 2% QUICK START PROCEDURE Demonstration circuit 1249 is easy to set up to 1. With the power source to the PSE turned off, evaluate the performance of the LTC4267-3. For connect the input power supply to the board proper equipment setup, refer to figure 1 and fol- through the J1 filtered Ethernet connector. low the procedure below: 2. In addition to a PSE, the DC1249 board can be powered by an alternate input power supply 1 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1249 POE TO 3.3V 3.0A ISOLATED through the VPORTP (TP16) and VPORTN 5. Verify proper classification and signature de- (TP15) terminals. Do not connect more than tection. one power source. 6. Check the output voltage. It should be 3.3V, 3. Connect the SIGNATURE DISABLE signal to typical. If there is no output, temporarily dis- VPORTN. connect the load to make sure that the load is not too high. 4. Turn on the PSE or alternate input power sup- ply and increase the voltage until the power 7. Once the proper output voltage is established, converter turns on. Be careful not to exceed adjust the load current within the appropriate 57VDC. NOTE: Make sure that the input volt- range and observe the output regulation, ripple age does not exceed 57VDC. If a higher volt- voltage, efficiency and other parameters. age is required, power components with higher voltage ratings should be used. OPERATION Demonstration circuit 1249 interfaces with a cus- the LTC4267-3 are disabled. Signature detection, tomers Power-over-Ethernet test setup per Figure classification and the internal power MOSFET 1. The front end of the demo circuit implements switch are all disabled. the required Ethernet input interface transformer coupling and common-mode termination through Note that the SIGNATURE DISABLE signal at the integrated connector J1. The demonstration TP10 is an open circuit. While it is true that this circuit is set up to allow data to pass in and back signal is internally pulled down within the out of the demo circuit while the DC1249 performs LTC4267-3, the data sheet explicitly states that IEEE 802.3af interface functions. The Power this signal must be tied to VPORTN or VPORTP. Sourcing Equipment (PSE) is connected to J1 and This signal is left open only for the convenience of the PHY is optionally connected to J2. the user when operating the demonstration circuit. The SIGNATURE DISABLE signal must be prop- The PD is required to have 0.1uF of capacitance erly terminated in a production application. during detection this is provided by C2. It is also required to have at least 5uF of capacitance after Classification is programmed by the selection of a the in-rush circuit, provided by capacitors C1 and single external resistor, R17, connected to the C9. RCLASS pin. This demo circuit allows detection and power After detection and classification, the PD is pow- classification of the PD per the IEEE 802.3af ered up when the input voltage exceeds the specification. During the detection process of a LTC4267-3 turn-on under-voltage lock out (UVLO) PD, the LTC4267-3 displays the proper 25k sig- through a dual-level current-limited power switch. nature resistor. Signature detection may be dis- While the voltage between POUT and VPORTN is abled, if so desired, by pulling the SIGNATURE above the Power Good trip point, the amperage DISABLE line (TP10) up to VPORTP. If signature through the power switch is held below the low- classification is disabled, all interface functions of 2