DC1281A-B Analog Devices

DEMO MANUAL DC1281A LTC2209 16-Bit, 160Msps/180Msps/ 185Msps ADCs DESCRIPTION Demonstration circuit 1281A supports a family of 16- Several versions of the 1281A demo board supporting bit 160Msps/180Msps/185Msps ADCs. Each assem- the LTC2209 16-bit series of A/D converters are listed in bly features one of the following devices: LTC 2209, Table 1. Depending on the required resolution, sample rate LTC2209 3BC, or LTC2209 3CD high speed, high dynamic and input frequency, the DC1281A is supplied with the range ADC. appropriate ADC and with an optimized input circuit. The circuitry on the analog inputs is optimized for analog input Other members of this family include the LTC2208 which frequencies below 80MHz or from 80MHz to 160MHz. For is a 130Msps 16-bit version of this device. The LTC2208 is higher input frequencies, contact the factory for support. supported on the DC854 (CMOS) and the DC996 (LVDS). Lower speed, single-ended clock versions are also sup- Design files for this circuit board are available at ported on the DC918 and DC919. DEMO MANUAL DC1281A QUICK START PROCEDURE Demonstration circuit 1281A is easy to set up to evaluate DC1281A Demonstration Circuit Board Jumpers the performance of the LTC2209 A/D converters. Refer to The DC1281A demonstration circuit board should have Figure 1 for proper measurement equipment setup and the following jumper settings as default: (as per Figure 1): follow the procedure below: J2: Mode (VCC) 2s Complement DCS Off Setup J3: SHDN: (Run) Dither (Off) If a DC890 QuikEval II Data Acquisition and Collection J4: RAND (Off) PGA 1x System was supplied with the DC1281A demonstration J9: Unused Power Connector circuit, follow the DC890 Quick Start Guide to install the required software and for connecting the DC890 to the DC1281A and to a PC. 3.6V OR 3.3V RAND MODE PGA ANALOG INPUT DITHER SHDN ENCODE CLOCK Figure 1. DC1281A Setup (Zoom for Detail) dc1281af 2