DEMO MANUAL DC1501A LTC2393-16/LTC2392-16/ LTC2391-16, 1MSPS, 0.5MSPS, 0.25MSPS Low Noise ADC DESCRIPTION The LTC2393-16 family are low noise high speed ADCs intended to dem onstrate recommended grounding, part with both parallel and serial outputs that can operate from placement, routing and bypassing for this family of parts. a single 5V supply. The LTC2393-16 family supports a Also several suggested driver circuits for the analog inputs large 4.096V fully differential input range. This makes will be presented. them ideal for high performance applications that require Design les for this circuit board are available at DEMO MANUAL DC1501A DC718B/C QUICK START PROCEDURE Check to make sure that all switches and jumpers are Note that J16 has a 50 termination resistor to ground. set as shown in the connection diagram of Figure 1. The Run the QuickEval-II software (Pscope.exe version K66 default connections con gure the ADC for parallel opera- or later) supplied with DC718B/C or download it from tion with the output data in offset binary format. The www.linear.com. analog input is AC-coupled and the internal reference of Complete software documentation is available from the the ADC is used. Help menu. Updates can be downloaded from the Tools Connect DC1501A to a DC718B/C USB High Speed Data menu. Check for updates periodically as new features Collection Board using connector J1. Connect DC718B/C may be added. to a host PC with a standard USB A/B cable. Apply 9V to The Pscope software should recognize DC1501A and the indicated terminals. Apply a low jitter signal source to con gure itself automatically. J17. The default setup uses a single-ended to differential converter so that it is only necessary to apply an input Click the Collect button (See Figure 6) to begin acquiring signal to J17. Connect a low jitter 1MHz 3.3V sine wave P-P data. The Collect button then changes to Pause, which or square wave to connector J16 for LTC2393-16. Apply can be clicked to stop data acquisition. 500kHz for LTC2392-16 and 250kHz for LTC2391-16. DC1501A SETUP DC Power This limits the max clock frequency of DC1501A-A to 80MHz in serial mode. DC1501A-B is limited to 40MHz and DC1501 requires 9VDC at approximately 100mA. Most DC1501A-C is limited to 20MHz. In the parallel mode there of the supply current is consumed by the CPLD, op amps, is a 1:1 ratio of clock frequency to conversion rate. If the regulators and discreet logic on the board. The 9VDC clock input is to be driven with logic, it is recommended that input voltage powers the ADC through LT1763 regulators the 50 terminator (R17) be removed. Slow rising edges which provide protection against accidental reverse bias. may compromise SNR of the converter in the presence of Additional regulators provide power for the CPLD and high-amplitude higher frequency input signals. op amps. See Figure 1 for connection details. Data Output Clock Source Parallel data output from this board (0V to 3.3V default), You must provide a low jitter 3.3V sine or square wave P-P if not connected to DC718, can be acquired by a logic to J16. The clock input is AC-coupled so the DC level of the analyzer, and subsequently imported into a spread-sheet, clock signal is not important. A generator like the HP8644 or mathematical package depending on what form of digital or similar is recommended. Even a good generator can start signal processing is desired. Alternatively, the data can be to produce noticeable jitter at low frequencies. Therefore fed directly into an application circuit. Use pin 3 of J1 to it is recommended for lower sample rates to divide down latch the data. The data can be latched using either edge a higher frequency clock to the desired sample rate. One of this signal. The data output signal levels at J1 can also way to accomplish this is by placing the ADC in the serial be reduced to 0V to 2.5V if the application circuit cannot mode. This can be accomplished by setting the SER/PARL tolerate the higher voltage. This is accomplished by moving position of SW1 to the high position. In the serial mode J13 to the 2.5V position. the ratio of clock frequency to conversion rate is 80:1. dc1501A 2