DEMO MANUAL DC1561B + LTC4278: PoE (802.3at) Powered Device Controller and Synchronous Flyback DESCRIPTION Demonstration circuit 1561B is an Ethernet Alliance The LTC4278 provides IEEE 802.3at standard (PoE+) PD certified Power over Ethernet (PoE) powered device (PD), interfacing and power supply control. When the PD fully featuring the LTC 4278. The DC1561B also features a wide powers, the PD interface passes power from the PSE to the auxiliary input voltage range of 9V to 57V. The demon- switcher through an internal, low resistance, high power stration board can connect to a Type 2 Power Sourcing MOSFET. The highly integrated LTC4278 controls a high Equipment (PSE) device, such as the DC1567. power, small power supply that utilizes a highly-efficient isolated flyback topology with synchronous rectification. This board is a Type 2 (IEEE 802.3at) compliant, high The DC1561B outputs 5V at 4.5A. power Power over Ethernet (PoE), Powered Device (PD). The DC1561B also features a wide auxiliary input voltage DC1561B also demonstrates the use of an auxiliary wall range of 9V to 57V. The demonstration board can connect adapter for nominal 12VDC, 24VAC/24VDC, or 48VDC sys- to a Type 2 Power Sourcing Equipment (PSE) device, such tems. When present, the auxiliary supply is the dominant as the DC1567. supply over PoE to provide power. Design files for this circuit board are available. All registered trademarks and trademarks are the property of their respective owners. PERFORMANCE SUMMARY (T = 25C) A PARAMETER CONDITION VALUE PoE Input Voltage (V ) At RJ45 Jack (J1) 37V to 57V PORT + Auxiliary Input Voltage (V ) From AUX to AUX Terminals 8V(On)/7V(Off) to 57V AUX Output Voltage (V ) Typical 5V OUT Output Current (I ) Over 9V to 57V Input Voltage 4.5A (Max) OUT Output Voltage Ripple (Typ) Over 9V to 57V Input Voltage, I = 4.5A 30mV (Typ) OUT PP Output Regulation PoE Input Voltage, I = 0A to 4.5A 0.4% (Typ) OUT Auxiliary Input Voltage, I = 0A to 4.5A 1.1% (Typ) OUT Output Voltage Response to Load Step (Typ) Load Step = 2.25A to 4.5A, 48V Input Voltage 500mV (10%) (Typ) Settling Time (Within 1% of V ) < 150s (Typ) OUT Switching Frequency 250kHz (Typ) Efficiency V = 24V, I = 4.5A (Includes Diode D12) 89% (Typ) AUX OUT Rev A 1DEMO MANUAL DC1561B OPERATING PRINCIPLES A compatible high power PSE board, such as the DC1567, When the soft-start period is over, the output voltage connects to the DC1561B at the RJ45 connector J1 (see regulates by observing the pulses across the bias wind- the schematic in Figure 12). As required by IEEE 802.3at, ing during the flyback time. The Primary Gate drive (PG) the DC1561B uses a diode bridge across the data pairs and Synchronous Gate (SG) drive Pulse Width Modulates and signal pairs. Schottky diodes (D2-D9) are used at the (PWM) in order to keep the output voltage constant. The input to improve efficiency over standard diode bridges. synchronous gate drive signal transmits to the secondary The LTC4278 provides the PoE required 25k signature via the small signal transformer, T2. The output of T2 drives resistance and classification up to class 4 (25.5W). When a discrete gate drive buffer, R22 and Q6/7 to achieve fast the PD is powered and voltage reaches above the PoE On gate transition times, hence higher efficiency. Voltage, the LTC4278 switches the port voltage over to the The two-stage input filter, C5, L2, and C6 and output filter, power supply controller through its internal MOSFET. This C1/C3, L1, and C9 are the reasons that this PoE flyback voltage allows the Zener and NPN-based linear regulator supply has exceptionally low differential mode conducted (R9/D17/Q3) to power up the bias pin, V , of the power CC emissions. A common mode filter consisting of a common supply controller. The IC begins a controlled soft-start of mode choke (L3) and common mode capacitor (C34) yields the output. As the output voltage rises, bias power takes low common mode emissions out of the power supply. over by the bias supply made up of T1s bias winding and D11 since it reverse biases the linear regulators (Q3) base to emitter junction. QUICK START PROCEDURE Demonstration circuit 1561B is easy to set up to evaluate 3. Check for the proper output voltage of 5V. + the performance of the LTC4278 in a PoE PD application. 4. Once the proper output voltage is confirmed, adjust the Refer to Figure 1 for proper equipment setup and follow outputs load current within the operating range and the procedure below: observe the output voltage regulation, output ripple 1. Place test equipment (voltmeter, ammeter, and electronic voltage, efficiency, and other parameters. load) across output. NOTE: When measuring the input or output voltage ripple, 2. Input supplies: care must be taken to avoid a long ground lead on the oscilloscope probe. Measure the output (or input) voltage + a. Connect a PoE capable PSE, like the DC1567, with ripple by touching the probe tip and probe ground directly an Ethernet cable to the RJ45 connector, J1. See across the +VOUT and VOUT (or VPORT P and VPORT N) Figure 1. terminals. See Figure 2 for proper scope probe technique. b. Or, connect a 37V to 57V capable power supply (Power Supply in Figure 1) across VPORT P and VPORT N. c. Or, if evaluating the auxiliary power supply capa- bility, connect a 9V to 57V at 4A capable power supply across AUX+ to AUX (Auxiliary Supply in Figure 1). Rev A 2