DC1652A DC1652A April 8, 2011 LTC6803-2 Battery Monitor HARDWARE/SOFTWARE USERS GUIDE DESCRIPTION Evaluation circuit DC1652A is a Battery Monitoring also has a built in high-accuracy reference. System to demonstrate the functional operation of the In addition, each individual cell connection has a soft- LTC6803-2 integrated circuit. The LTC6803-2 is a ware controlled discharge transistor. This allows the complete battery monitoring IC that can measure as implementation of precision cell charging algorithms many as 12 series connected cells with a total voltage including charge shedding of over-voltage cells. of 60V. A simple SPI serial interface is used to com- A group of up to ten DC1652A boards can be managed municate battery state information to a system control through the USB port of a PC using an on screen con- processor. trol panel GUI available from LTC. Use of an on-board discrete-device SPI-bus daisy- chain or optional isolated serial interface allows moni- toring of completely separate battery cell packs or a LTC6803-2 FEATURES series stack of cells. Stacking of cells permits the mon- 12-bit accurate voltage measurement of 12 battery itoring of each individual cell in systems requiring cells (60V maximum/board). 100s of volts from the battery pack, such as those 4-bit addressable serial interface for high cell count used in Hybrid Electric Vehicles (HEVs). Each device systems (16 boards x 12 cells = 192 Cells). Packet error checking (PEC) for all commands. CELLS CONNECTOR New commands allow measuring of individual or all cell voltages, open wire connections and tempera- ture sensors. Option to measure cell voltages and perform open wire detection with or without the cell discharge transistors conducting. ISOLATED SPI PORT Enhanced self test functions. Thermal Shutdown built in and flagged. Silicon revision code provided MAIN SPI TOP SPI DC1652A DEMO FEATURES INTERFACE PORT CONNECTOR Graphical User Interface (GUI) for demonstrating new features. ADDRESS Optional isolated main SPI communication port. JUMPERS External discrete circuitry for daisy-chained current LTC6803-2 mode SPI communication up and down a stack of monitors. ESD and fault protection circuitry included. 1 DC1652A GETTING STARTED WITH ONE BOARD CONNECTED SINGLE BOARD CONNECTION TO PC AND GUI Step 1. Set jumpers on DC1652A to the default posi- tions indicated in Table 1 (and Figure 1). TABLE 1. JUMPER FUNCTIONS JUMPER FUNCTION DEFAULT 1 POSITION 0 POSITION POSITION Two Jumper Block to Select Voltage Labeled V on board. Sets bottom Labeled I on board. Sets Top and Bottom JP1 Voltage or Current Mode for Mode port for voltage mode SPI commu- ports for Current Mode SPI communication Bottom SPI Port nication. using external daisy-chain current source circuitry. SPI Daisy Chain Configura- 1, 1, 1, 1 For V Mode communication to all For SPI daisy-chain (current mode) com- JP6,JP7,JP8,JP9 tion Jumpers: boards (e.g. using isolators) set all munication set all four jumpers to the 0 Top of Stack four jumpers to the 1 position. setting. This enables the top port on each (TOS) (All Four Jumpers Must board for current mode communication For SPI daisy chain communication Setting be Moved Together) up/down the stack. this setting is required for only the board at the top of a cell stack. These settings connect the top Use these settings also for the bottom daisy chain current source transis- board in a daisy chain stack, which should tors to the top cell at the top of the also be set to V mode (JP1) for the bottom cell stack. port communication to a system controller. Board Address Setting 0, 0, 0, 0 Logic 1 setting Logic 0 setting JP2,JP3,JP4,JP5 (0000 to 1111) (for address 0000) JP2 is MSB JP5 is LSB Step 2. Before running the DC1652 GUI, a DC590 unless DC590 is connected to the computer and the driver must be installed. To do this, install the DC1652A board. Quick Eval Software. Quick Eval can be down- Step 5. Connect the cells to be monitored to the cells loaded from: connector J1. This connector is in two pieces. The