DC1658A-B Analog Devices

DEMO MANUAL DC1658A LTC3388-1/LTC3388-3: 20V High Efficiency Nanopower Step-Down Regulator Description Demonstration Circuit DC1658A is a 20V high efficiency Four output voltages are pin selectable with up to 50mA nanopower step-down converter featuring the LTC3388-1/ of continuous output current. A power good comparator LTC3388-3, an ultralow quiescent current step-down produces a logic high referenced to V on the PGOOD OUT regulator. The input current is only 720nA typical at no pin when the converter reaches the programmed V , OUT load while maintaining output voltage regulation. The signaling that the output is in regulation. LTC3388-1/LTC3388-3 is capable of supplying 50mA of The LTC3388EMSE-1/LTC3388EMSE-3 are available in a load current, and incorporates an accurate undervoltage 10-lead (3mm 3mm) MSE surface mount package with lockout feature to disable the converter and maintain a exposed pad. low quiescent current state when the input voltage falls Design files for this circuit board are available at below 2.3V. In regulation, the LTC3388-1/LTC3388-3 enter DEMO MANUAL DC1658A o perating p Refer to the block diagram within the LTC3388-1/ Two logic pins, EN and STBY, determine the operating mode LTC3388-3 data sheet for its operating principle. of the LTC3388-1/LTC3388-3. When EN is high and STBY is low the synchronous buck converter is enabled and will The LTC3388 is an ultralow quiescent current power sup- regulate the output if the input is above the programmed ply designed to regulate the output voltage by means of a output voltage and above the UVLO threshold. If EN is low, nanopower high efficiency synchronous buck regulator. See the buck converter circuitry is powered to save quiescent Figure 1 for the LTC3588-1 50mA efficiency versus input current. The internal rail generation circuits are kept alive voltage curves for the four output voltage settings. Figure and the voltages at V and CAP are maintained. IN2 2 is the efficiency curves for the LTC3588-3. The input current is only 720nA typical at no load while maintaining While enabled, the LTC3388-1/LTC3388-3 can be placed output voltage regulation capable of supplying 50mA of in standby mode by bringing STBY high. In standby mode load current. the buck converter is disabled, eliminating the quiescent current used to run the buck circuitry. The PGOOD and The LTC3388-1/LTC3388-3 also incorporates an accurate sleep comparators are kept alive to maintain the state undervoltage lockout feature to disable the converter and of the PGOOD pin. The sleep comparator has a lower maintain a low quiescent current (approximately 400nA), quiescent current than the PGOOD comparator and when state when the input voltage falls below 2.3V. When the the LTC3388-1/LTC3388-3 is in sleep mode, the PGOOD voltage on V rises above the UVLO rising threshold, the IN comparator is shut down and PGOOD is held high. If buck converter is enabled and charge is transferred from STBY is driven high with EN low, it will be ignored and the input capacitor to the output capacitor. will remain in shutdown. The buck regulator uses a hysteretic voltage algorithm Four output voltages are available by tying the output to control the output through internal feedback from the select pins, D0 and D1, to GND of V . Table 1 shows IN2 V sense pin. The buck converter charges the output OUT the four D0/D1 codes and their corresponding output capacitor through an inductor to a value slightly higher voltages with up to 50mA of continuous output current. than the regulation point. It does this by ramping the The internal feedback network draws a small amount of inductor current up to 150mA through an internal PMOS current from V . OUT switch and then ramping down to 0mA through an internal NMOS switch. When the buck converter brings the output A power good comparator produces a logic high ref- voltage into regulation, the LTC3388-1/LTC3388-3 enter erenced to V on the PGOOD pin when the converter OUT a sleep state in which both input and output quiescent reaches the programmed V , signaling that the output OUT currents are minimal. The buck converter turns on and is in regulation. The PGOOD pin will remain Hi-Z until off as needed to maintain regulation. V falls below 92% of the desired regulation voltage. OUT IF PGOOD is high and V falls below the UVLO falling IN threshold, PGOOD will remain high until V falls to 92% OUT of the desired regulation point. dc1658afb 2 rinciple