DEMO MANUAL DC1708A LTC3634 15V Dual 3A Monolithic Step-Down Regulator Board for DDR Power Description Demonstration circuit DC1708A is a dual-output regulator operate in either Burst Mode operation or forced continu- focused specifically for DDR memory power applications. ous mode. In Burst Mode operation, which is the preferred It is built based on the LTC 3634, a high voltage dual- mode of low load current operation, the DC supply current channel, controlled on-time monolithic synchronous buck is typically only 1.3mA (both channels) at no load (sleep regulator. The DC1708A has an input voltage range of 3.6V mode), and less than 15A in shutdown. In Burst Mode to 15V. The output voltage of the first channel, V , of DDQ operation or continuous mode operation, the DC1708A the DC1708A has three fixed voltage settings: 1.5V, 1.8V is a very efficient circuit at high load currents: over 80% and 2.5V, and is capable of delivering up to 3A of output for either channel. The LTC3634 is also capable of 90 or current. The second channel, V , is set to regulate to half TT 180 out-of-phase operation, and can allow its output to the voltage on the VDDQIN pin, which can be either the track an external voltage, either coincidentally or ratio- channel 1 output or an external reference voltage. It can metrically. The LTC3634 comes in a 28-pin QFN package, source or sink a maximum of 3A of output current. The featuring an exposed pad on the bottom-side of the IC for LTC3634 also provides a 10mA buffered output of half better thermal performance. All of these features make VDDQIN VTTR, which is used to provide the reference the DC1708A an ideal circuit for powering DDR memory voltage needed for DDR applications. With the use of a applications. timing resistor, the DC1708A can have its operating fre- Design files for this circuit board are available at quency programmed from 500kHz to 4MHz. Additionally the DC1708A can be easily synchronized to an external DEMO MANUAL DC1708A Quick s tart p D The DC1708A is easy to set up to evaluate the performance resistor from V to V , along with an amp meter. The IN OUT of the LTC3634. For a proper measurement equipment current will be V minus V divided by the variable IN OUT configuration, set up the circuit according to the diagram resistor value). V output voltage tolerance should DDQ in Figure 1. be within 2%, whereas the output voltage tolerance of V should be within 3%. TT NOTE: When measuring the input or output voltage ripple, care must be taken to avoid a long ground lead on the 5. Set the load current of both outputs to 3A and the oscilloscope probe. Measure the input or output voltage input voltage to 12V, then measure each output ripple ripple by touching the probe tip directly across the V voltage (refer to Figure 2 for the proper measurement IN or V and GND terminals. See the proper scope probe technique). Each should measure less than 20mVAC. OUT technique in Figure 2. Also, observe the voltage waveform at either switch node (Pins 23 and 24 for channel 1, and Pins 13 and Please follow the procedure outlined below for proper 14 for channel 2) of each regulator. Both switch node operation. waveforms should be rectangular in shape, and 180 1. Connect the input power supply to the V and GND out-of-phase with each other. The switching frequencies IN terminals. Connect the loads between the V and GND should be between 800kHz and 1.2MHz (T = 1.25s and OUT terminals. Refer to Figure 1 for the proper measurement 0.833s). equipment setup. 6. With the board under proper operation, observe the load Before proceeding to operation, insert jumper shunts regulation, efficiency, 90 out-of-phase operation (by XJP1 and XJP2 into the OFF positions of headers JP1 changing jumper XJP4 to the 90 position), or Burst and JP2, shunt XJP3 into the forced continuous mode Mode operation (by changing jumper XJP3 to the Burst (FCM) position of MODE header JP3, shunt XJP4 into Mode position). the 180 (out-of-phase) position of PHASE header JP4, 7. Optional: Moving the 0 resistor at R , inserting it VDDQ shunt XJP5 into the soft-start position of TRACK/SS into R , and applying a voltage to turret VDDQIN DDQIN header JP5, and shunt XJP6 into the V voltage OUT1 allows the channel 2 output voltage (V ) to be adjusted TT options of choice of header JP6: 1.2V, 1.5V or 1.8V. to one-half the voltage at VDDQIN. 2. Apply 5V at V . Measure both V . Both should read IN OUTs When finished, insert shunts XJP1 and XJP2 to the off 0V. If desired, one can measure the shutdown supply position(s) and disconnect the power. current at this point. The supply current should ap- proximately 15A in shutdown. Warning - If the power for the demo board is carried in long leads, the input voltage at the part could ring, which 3. Turn on V , V , and V , V , by shifting shunts OUT1 DDQ OUT2 TT could affect the operation of the circuit or even exceed XJP1 and XJP2 from the OFF positions to the ON posi- the maximum voltage rating of the IC. To eliminate the tions. Both output voltages should be within a tolerance ringing, a small tantalum capacitor (for instance, the AVX of 1%. part TAJW335M035R) is inserted on the pads between 4. Vary the input voltage from 3.6V to 15V, the channel the input power and return terminals on the bottom of the 1 load current from 0A to 3A, and the channel 2 load demo board. The (greater) ESR of the tantalum capacitor current from 0A to 3A (the V channel sinks as well will dampen the (possible) ringing voltage due to the use TT as sources current. An easy way to test this capability of long input leads. On a normal, typical PCB with short is shown in the test setup diagram. Connect a variable traces, this capacitor is not needed. dc1708af 2 ure roce