DC1760A Analog Devices

DEMO MANUAL DC1760A LTC2261-14 and LTC6409 12-/14-Bit, 25Msps to 150Msps ADC Combo Board DESCRIPTION Demonstration circuit 1760A supports a family of 14- circuitry on the analog inputs is optimized for analog input /12-bit 25Msps to 150Msps ADCs and an LTC 6409 low frequencies from DC to 100MHz. Refer to the data sheet noise amplifier. Each assembly features a device from the for proper input networks for different input frequencies. LTC2261-14 family of high dynamic range 1.8V ADCs and Design files for this circuit board are available at a LTC6409 low noise amplifier. DEMO MANUAL DC1760A QUICK START PROCEDURE Demonstration circuit 1760A is easy to set up to evaluate PAR/SER: Selects parallel or serial programming mode the performance of the LTC2261-14 family of A/D convert- (Default: Serial). ers. Refer to Figure 1 for proper measurement equipment Duty Cycle Stabilizer (DCS): In parallel programming mode setup and follow the procedure below: enables/disable Duty Cycle Stabilizer (Default: Enable). Setup SHDN: In parallel programming mode enables and disables the LTC2261-14 (Default: Enable). If a DC890 QuikEval-II data acquisition and collection system was supplied with the DC1760A demonstration LVDS: In parallel programming mode selects between circuit, follow the DC890 Quick Start Guide to install the CMOS and LVDS outputs. (Default: LVDS, required for required software and for connecting the DC890 to the serial programming mode. When using parallel mode the DC1760A and to a PC. required setting is CMOS). AMP SHDN: Enables and disables the LTC6409. (Default: DC1760A Demonstration Circuit Board Jumpers Enable) The DC1760A demonstration circuit board should have the following jumper settings as default positions: (as per Figure 1). 3.3V JUMPERS ARE SHOWN 2.7V TO 5V IN DEFAULT POSITIONS SINGLE-ENDED INPUT SIGNAL PARALLEL DATA OUTPUT TO DC890 MATCHED SOURCE IMPEDANCE SINGLE-ENDED ENCODE CLOCK Figure 1. DC1760 Setup (Zoom for Detail) dc1760af 2 V + V +