DEMO MANUAL DC1899A LTC4228-1/LTC4228-2 Dual Ideal Diode and Hot Swap Controller DESCRIPTION Demonstration circuit 1899A controls two independent indicate status, power good and fault conditions separately power rail circuits each with Hot Swap and ideal diode for each channel, and input voltage snubbers. There are functionality provided by the LTC4228-1/LTC4228-2 dual pads for optional RC circuits for each Hot Swap MOSFET ideal diode and Hot Swap controller. gate in order to adjust output voltage slew rate. In addition to this there are jumpers allowing monitoring of supply DC1899A facilitates evaluation of LTC4228 performance undervoltage conditions at either IN or SENSE+ pins. in different operation modes such as supply ramp-up, power supply switchover, steady state, and overcurrent The standard configuration (as DC1899A populated by faults. Power supply switchover mode can be realized as default) places the ideal diode MOSFET ahead of the Hot either an ideal diode or as a prioritizer. Swap MOSFET. The board also has pads for an alternative configuration with the Hot Swap MOSFET located ahead Each DC1899A circuit is assembled to operate with a of the ideal diode MOSFET. 12V supply and 9A maximum current load. The main components of the board are the LTC4228 controller, two Design files for this circuit board are available at MOSFETs operating as ideal diodes, two MOSFETs operat- DEMO MANUAL DC1899A PERFORMANCE SUMMARY Specifications are at T = 25C A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input/Output Pin V ONn On Pin Threshold Voltage ON Rising 1.21 1.235 1.26 V ON(TH) V ONn Pin Fault Reset Threshold Voltage ON Falling 0.55 0.6 0.63 V ON(RESET) V EN Pin Threshold Voltage EN Rising 1.185 1.235 1.284 V EN(TH) V TMRn Pin Threshold Voltage TMR Rising 1.198 1.235 1.272 V TMR(TH) TMR Falling 0.15 0.2 0.25 V I TMRn Pin Pull-Up Current TMR = 1V, In Fault Mode 75 100 125 A TMR(UP) I TMRn Pin Pull-Down Current TMR = 2V, No Faults 1.4 2 2.6 A TMR(DN) I TMRn Current Ratio I /I 1.4 2 2.7 % TMR(RATIO) TMR(DN) TMR(UP) OPERATING PRINCINPLES The LTC4228 functions as an ideal diode with inrush An active current limit amplifier servos the gate of the Hot current limiting and overcurrent protection by controlling Swap MOSFET to 65mV across the current sense resistor. two external back-to-back N-channel MOSFETs in a power Inrush current can be further reduced, if desired, by add- path. The LTC4228 has two ideal diode and two Hot Swap ing a capacitor from HGATE to GND. When the MOSFETs controllers. Each ideal diode MOSFET is intended to oper- gate overdrive (HGATE to OUT voltage) exceeds 4.2V, the ate with a defined Hot Swap MOSFET, because they are PWRGD pin pulls low. When both MOSFETs (Q1 and Q2 or tied by common on/off control, and ideal diode controller Q3 and Q4) are turned on, the gate drive amplifier controls sense voltage includes both MOSFETs and sense resistor DGATE to servo the forward voltage drop (V V ) IN OUT voltage drop. Therefore, LTC4228 provides independent across the sense resistor and the back-to-back MOSFETs control for the two input supplies. to 25mV. If the load current causes more than 25mV of voltage drop, the gate voltage rises to enhance the MOSFET The LTC4228 gate drive amplifiers monitor the voltage used for ideal diode control. For large output currents the between the INn and OUTn pins and drive the DGATEn MOSFETs gate is driven fully on and the voltage drop is pins. The amplifier quickly pulls up the DGATE pin, turning equal to the sum of the I R of the two MOS- LOAD DS(ON) on the MOSFET (Q1 or Q3), for ideal diode control when FETs in series. it senses a large forward voltage drop. Pulling the ON pin high and EN pins low initiates a 100ms debounce timing In the case of an input supply short-circuit when the cycle. After this timing cycle, a 10A current source from MOSFETs are conducting, a large reverse current starts the charge pump ramps up the HGATEn pin. When the Hot flowing from the load towards the input. The gate drive Swap MOSFET (Q2 or Q4) turns on, the inrush current amplifier detects this failure condition as soon as it ap- is limited to a set level set by an external sense resistor pears and turns off the ideal diode MOSFET by pulling placed between IN and SENSE pins. down the DGATE pin. dc1899af 2