DEMO MANUAL DC2060A LTC4229 Single Ideal Diode and Hot Swap Controller Description Demonstration circuit 2060A is a single-rail circuit with for the ideal diode voltage regulation. The combination of an ideal diode and Hot Swap functionality provided by both features allows the implementation of four different the LTC 4229, ideal diode and Hot Swap controller. The configurations. main components of this circuit are two series connected The typical configuration (as DC2060A is populated by N-channel MOSFETs, a power sense resistor, a few pas- default) has the ideal diode MOSFET ahead of the Hot sive components, nine jumpers for selection of alternative Swap MOSFET with voltage regulation across the ideal operation modes, and four LEDs for visual indication of diode MOSFET. There is an option to use two back-to-back the controller signals. One of the MOSFETs operates as an MOSFETs instead of one ideal diode MOSFET to prevent ideal diode and the other one as a Hot Swap power switch. powering the load before the gate voltage of the ideal diode DC2060A facilitates evaluation of the LTC4229 in the dif- MOSFET ramps up. ferent operation modes such as supply ramp-up, steady The LTC4229 provides voltage regulation to the ideal state, overcurrent faults, and power supply switchover. diode across the single ideal diode MOSFET or across Power supply switchover mode can be realized when the three series connected components: ideal diode MOSFET, LTC4229 controller operates in a prioritizer set up or when sense resistor, and Hot Swap MOSFET. a second ideal diode circuit is added. The bottom side of the board includes pads for an alter- The DC2060A circuit is assembled to operate with a 12V native configuration with the Hot Swap MOSFET located supply and 10A maximum current load. The operating ahead of the ideal diode. voltage can be easily readjusted for any voltage between Provision is made for the selection of ideal diode regula- 2.9V and 18V. tion components: single ideal diode MOSFET or series Pads on key nodes are intended to be used as test points. connected ideal diode MOSFET, sense resistor, and Hot + The LTC4229 controller has two independent pins (SENSE Swap MOSFET. and SENSE ) for the current sense signal. That simplifies Design files for this circuit board are available at using two configurations with the series connection of the DEMO MANUAL DC2060A o p The LTC4229 functions as an ideal diode with inrush cur- High pull-up current of the ideal diode MOSFET guarantees rent limiting and overcurrent protection by controlling two minimum voltage droop during supply switchover and a external N-channel MOSFETs (Q2 and Q3) in a power path. short turn-on time. All component designators refer to the DC2060A schematic. Enabling the Hot Swap control with the EN pin (low) initiates a debounce time interval, which can be fixed at An internal charge pump provides energy for both MOSFET 100ms, or 8.9ms to 17.5ms set by the capacitor C9 on gate drivers through their individual current sources. Each the DTMR pin. MOSFET has an ON/OFF control: Q2 with DOFF pin signal (JP9) and Q3 with EN pin signal (JP7). The foldback current limit and electronic circuit breaker of the Hot Swap MOSFET protect the input rail against short The LTC4229 regulates the voltage between the IN pin circuit faults and excessive load. and the diode sense pin (DSNS), so the DSNS connec- tion defines the power path node in which the ideal diode After the debounce time, a 10A current source from the regulates the voltage. There is an option (JP2) to connect charge pump ramps up the HGATE pin. When the Hot Swap the DSNS pin to Q2 drain or to the OUT node. Selection MOSFET Q3 turns on, the maximum current is limited to of this connection should be accompanied by a suitable a level set by an external sense resistor RS1 (or RS2 in signal at the DCFG pin. The proper signal is reached by the optional application with Q4 MOSFET). placing the shunt of the jumper DC CFG(JP8) in the When both MOSFETs Q2 and Q3 (or Q4 and Q5 in the proper position. optional application) are turned on, the gate drive amplifier Table 1 demonstrates possible power path topologies controls DGATE to servo the forward voltage drop across for DC2060A and conditions necessary to achieve them. the MOSFET Q2 (or both MOSFETs and sense resistor) to 65mV. If the load current causes more than 65mV of The LTC4229 precision comparators are used to monitor voltage drop, the gate voltage rises to enhance the ideal the input voltage for both UV and OV conditions. Enabling diode MOSFET. the ideal diode functionality with the DOFF pin (low) forces the ideal diode gate drive amplifier to monitor the voltage If the MOSFETs are conducting, and an input supply is between the IN and DSNS pins. Sensing the large forward shorted, a large reverse current starts flowing from the load voltage drop, the gate drive amplifier quickly pulls up to the input. The gate drive amplifier detects this failure DGATE turning the ideal diode MOSFET on. condition as soon as it appears and turns the ideal diode MOSFET Q2 off, by pulling down the DGATE pin. The HGATE pin continues pulling high and keeps the MOSFET Q3 on. dc2060af 2 rinciples perating