DEMO MANUAL DC2148A LT8709 Negative Input Synchronous Multi-Topology DC/DC Controller Description Demonstration circuit 2148A features the LT 8709, a The MODE input is pulled up to INTV by 100k resistor CC negative input synchronous multi-topology DC/DC con- R14 which allows discontinuous conduction mode (DCM) troller designed for negative input power supplies where and pulse-skipping operation. There is a placeholder that the highest input supply voltage is ground. Examples can be used to connect MODE to V instead of INTV IN CC of these circuits include negative buck, negative boost, for continuous conduction mode (CCM) switching. negative buck-boost and negative inverting. The DC2148A The switching frequency is adjustable using resistor R5. is a negative buck-boost with an operating input voltage The SYNC input can be used to synchronize the switch- range from 4.5V to 38V and an output voltage of 12V, ing frequency. Zero ohm jumper R16 from SYNC to V IN however this demo circuit can be easily reconfigured for must be removed prior to using the SYNC input. Feedback other negative input topologies. The maximum output cur- loop compensation can be optimized using components rent for DC2148A is 5A, the switching frequency is 400kHz R6, C7 and C8. and the maximum efficiency with a 12V input is 91%. Capacitor C14 at the SS pin programs soft-start. PG is an The output voltage is programmed with a single resis- open-collector status flag output and is pulled up to the tor R7 and a 4.22V turn-on threshold is programmed INTV pin voltage by the 100k resistor R23. CC with resistor divider R3 and R4. Current sense resistor There are placeholders to add level shifting circuitry for R1 programs the switch current limit and current sense EN/FBIN, SYNC and PG signals. In addition, the demo resistor R2 programs an output current limit. Filters can circuit is designed to be easily reconfigured to many other be added to the switch and output current sense resistors applications, including the example schematics in the data using component placeholders on the PCB. The I out- MON sheet. The PCB has extensive vias for thermal performance. put voltage is proportional to output current and a 0.1F capacitor C17 filters I . MON Synchronous switching and negative input operation make the LT8709 attractive for negative input, high-power This demo circuit uses logic-level 60V NMOS and PMOS voltage regulator circuits. The LT8709EFE is available in a that operate down to a 4.5V input voltage. Diode D1 is thermally enhanced 20-lead TSSOP package. The LT8709 in parallel with the PMOS to improve efficiency. Resis- data sheet must be read in conjunction with this demo tors can be added to the gate drives of both NMOS and manual to properly use or modify DC2148A. PMOS. There are placeholders so the NMOS and PMOS can be paralleled. Design files for this circuit board are available at DEMO MANUAL DC2148A p s Specifications are at T = 25C A PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Input Voltage, V 4.5 V VIN Maximum Input Voltage, V 38 V VIN Maximum Output Current (See Figure 2), I 12V > V > 38V 5 A OUT VIN V = 4.5V 2.5 A VIN Input EN/FBIN Turn-On Voltage, V R3 = 13.3k, R4 = 10k 1%, V = Rising 4.22 V VIN GND,VIN Output Voltage, V R7 = 130k 12.5 11.7 V OUT Efficiency V = 12V, I = 2.5A 91 % VIN OUT Switching Frequency R5 = 88.7k 400 kHz Output Current Limit R2 = 0.006, 1% 8.3 A dc2148af 2 ummary erformance