DC2350A-A Analog Devices

DEMO MANUAL DC2350A LTC6812-1/LTC6813-1 Daisy Chain isoSPI Battery-Stack Monitor DESCRIPTION Demonstration circuit 2350A is a multicell battery stack The DC2350 can communicate to a PC by connecting monitor featuring the LTC 6812-1, a 15-cell monitor on directly to a DC2026 Linduino One. The DC2026 must be the DC2350A-A, or the LTC6813-1, an 18-cell monitor on loaded with the appropriate program (called a sketch) the DC2350A-B. Multiple boards can be linked through a to control the battery stack monitor IC and receive data 2-wire isolated serial interface (isoSPI) to monitor any through a USB serial port. The DC2792/DC1941 can be number of cells in a stack. The demo circuit also features connected to the DC2026 to provide a fully isolated isoSPI reversible isoSPI enabling a fully redundant communica- interface to the DC2350. tion path. Design files for this circuit board are available at DEMO MANUAL DC2350A HARDWARE SETUP Table1. DC2350A-A J4 Pinout Wiring J4 Connector J4 Pin C Input PIN The DC2350A-A and DC2350A-B demo circuits (boards) 1 C0/V have different connector pinouts. It is critical that the cor- 2 C1 rect wiring is followed or there is a risk of damaging the 3 C2 demo board. 4 C3 When connected to a battery stack, power for the DC2350 5 C4 is provided by the cell group being monitored. To connect 6 C5 the cell group, separate the screw-terminal block section 7 NC from the J4 connector. Then, insert the cell-voltage con- 8 C6 nections or resistors into the screw-terminal clamping 9 C7 contacts. These connections provide the power and input 10 C8 stimulus for the battery stack monitor IC. 11 C9 Cell-voltages are wired to J4 starting from position 1 12 C10 (most negative potential of the group). Please refer- 13 NC ence the appropriate demo board J4 connector pinout in 14 C11 Tables1 and2. 15 C12 16 C13 Alternatively, resistors can be used to simulate battery 17 C14 cell-voltages. 100 0.5W or equivalent resistors are rec- 18 C15 ommended because 100 (or lower values) typically will 19 NC not induce measurement errors and the 0.5W (or greater rating) will keep the resistor temperatures low preventing Table2. DC2350A-B J4 Pinout power dissipation damage. J4 Pin C Input PIN DC2350A-A 15 Resistor Connection 1 C0/V 2 C1 Carefully connect fifteen 100 resistors onto the screw- 3 C2 terminal block between each C input clamping contact PIN 4 C3 and skip the NC (no connect) contacts from position 1 to 5 C4 position 18 as shown in Table 1, DC2350A-A J4 Pinout. 6 C5 Provide a stack-equivalent power supply connection 7 C6 to position 18 (positive) and position 1 (negative). The 8 C7 power supply may be adjusted to provide the desired 9 C8 nominal cell-voltage (e.g. 49.5V will be 3.3V per cell). 10 C9 DC2350A-B 18 Resistor Connection 11 C10 12 C11 Carefully connect eighteen 100 resistors between each 13 C12 screw-terminal block clamping contact from position 1 to 14 C13 position 19 as shown in Table2, DC2350A-B J4 Pinout. 15 C14 Provide a stack-equivalent power supply connection 16 C15 to position 19 (positive) and position 1 (negative). The 17 C16 power supply may be adjusted to provide the desired 18 C17 nominal cell-voltage (e.g. 59.4V will be 3.3V per cell). 19 C18 dc2350af 2