DEMO MANUAL DC239 NO-DESIGN SWITCHER LTC1502-3.3 Single Cell to 3.3V Regulated Charge Pump DC/DC Converter U DESCRIPTIO Demonstration Circuit DC239 is a quadrupler charge pump power conscious single-cell applications. The maximum DC/DC converter that produces a regulated 3.3V output output load is 10mA for input voltages greater than or from a single alkaline cell input. The circuit requires only equal to 1V. A jumper is available to put the circuit into five small external capacitors and no inductors. Low shutdown mode, which reduces input quiescent current to supply current (40m A typ) and minimal external compo- 5m A (typ) and disconnects V from V . Gerber files for OUT IN nent area make this power supply ideal for space and this circuit are available. Call the LTC factory. , LTC and LT are registered trademarks of Linear Technology Corporation. WWU W PERFOR A CE SU ARY Operating Temperature Range 0 C to 70 C PARAMETER CONDITIONS MIN TYP MAX UNITS V Operating Voltage 0.9 1.8 V IN Minimum V Start-Up Voltage 100kW V Load 0.75 0.9 V IN OUT V I 10mA, 1V V 1.8V 3.17 3.3 3.43 V OUT OUT IN V Operating Current I = 0mA, 0.9V V 1.8V 40 90 m A IN OUT IN V Shutdown Current C1 /SHDN = 0V, 0.9V V 1.8V 5 15 m A IN IN Output Ripple I = 10mA, V = 1.25V 50 mV OUT IN P-P Efficiency V = 1V, I = 10mA 77 % IN OUT W U U TYPICAL PERFOR A CE CHARACTERISTICS A D BOARD PHOTO Component Side Output Voltage vs Input Voltage 3.5 T = 25C A 3.4 I = 1mA OUT 3.3 I = 10mA OUT 3.2 I = 15mA OUT 3.1 3.0 0.8 1.0 1.2 1.4 1.6 1.8 INPUT VOLTAGE (V) 1502-3.3 TA02 1 OUTPUT VOLTAGE (V)DEMO MANUAL DC239 NO-DESIGN SWITCHER W U W SCHE ATIC A D PACKAGE DIAGRA S Demo Board Schematic U1 TOP VIEW J2 1 8 V C2 1 8 V C2 V OUT OUT OUT + + C2 C 3.3V/10mA C1 2 7 C3 2 7 OUT + + C1 C3 10m F 10m F 6 C3 C1 /SHDN 3 C1 C3 LTC1502-3.3 GND 4 5 V IN J1 1m F 1m F 3 6 C1 /SHDN C3 MS8 PACKAGE R1 4 5 J3 8-LEAD PLASTIC MSOP GND V 100W IN V IN C IN JP1 10m F LTC1502CMS8-3.3 J4 ON SHDN DC239 SCHEM PARTS LIST REFERENCE DESIGNATOR QUANTITY PART NUMBER DESCRIPTION VENDOR TELEPHONE C1, C3 2 0603ZG105ZAT1A 1m F 10V Y5V Capacitor AVX (843) 946-0362 C2, C , C 3 1206ZG106ZAT1A 10m F 10V Y5V Capacitor AVX (843) 946-0362 OUT IN JP1 1 2802S-03G2 3-Pin, 2mm Jumper Comm Con (626) 301-4200 J1, J2, J3, J4 4 2501-2 0.090 Turret Testpoint Mill-Max (516) 922-6000 R1 1 CR16-101JM 100W 1/16W 5% Chip Resistor TAD (800) 508-1521 U1 1 LTC1502CMS8-3.3 MSOP Step-Up DC/DC IC LTC (408) 432-1900 1 CCIJ2mm-138-G 2-Pin 2mm Shunt Comm Con (626) 301-4200 U OPERATIO The LTC1502-3.3 uses a switched capacitor quadrupler clocks are disabled when the output voltage is above the charge pump to produce a boosted output voltage. The desired regulation point set by COMP1. When the output quadrupler charge pump consists of two voltage doubler has dropped below the lower trip point of COMP1, the charge pumps (CP1 and CP2 on the Block Diagram) charge pump clocks are turned back on until V is OUT cascaded in series. CP1 doubles the input voltage V , and boosted back into regulation. IN the CP1 output voltage is stored on external capacitor C2. Enhanced Start-Up The C2 pin also serves as the input for doubler CP2, whose output is stored on the output capacitor C . Each OUT Enhanced start-up capability is provided by the COMP2 doubler is controlled by a 2-phase clock that is generated circuitry. COMP2 compares the divided C2 voltage to the in the timing-control circuit. On phase one of the clock, the input voltage, V . The COMP2 output disables the output IN flying capacitors C1 and C3 are charged to their respective charge pump, CP2, whenever the divided C2 voltage is input voltages. On phase two, each charged flying capaci- lower than V . The CP2 output is thereby forced into a IN tor is stacked on top of the input voltage and discharged high impedance state until the voltage on C2 has been through an internal switch onto its respective output. This raised above V (the C2 pin should not be loaded for IN sequence of charging and discharging the flying capaci- proper start-up). This allows a higher internal gate drive tors (CP1 and CP2) continues at the free running oscillator voltage to be generated (from the C2 pin) before the parts frequency (500kHz typ) until the output is in regulation. output (V ) is connected to a load. Hysteresis in COMP2 OUT Regulation is achieved by comparing the divided output forces CP2 to be turned ON and OFF while C is charged OUT voltage to a fixed voltage reference. The charge pump 2