DEMO MANUAL DC2637A LT3045EDD-1 20V, 2A, Paralleled Ultralow Noise, Ultrahigh PSRR LDO Regulator DESCRIPTION Demo circuit 2637A features four LT 3045EDD-1s in par- GND on each device. Current monitoring is also achieved allel, generating an ultralow noise, ultrahigh power supply by sensing the ILIM pin voltage. rejection ratio (PSRR) low dropout (LDO) regulator with Built-in protection includes reverse battery protection, programmable current limit. DC2637A operates over an reverse current protection, internal current limit with fold- input range of 3.8V to 20V, and is capable of delivering back, and thermal limit with hysteresis. up to 2A output current by paralleling four LT3045EDD-1s The LT3045-1 data sheet gives a complete descrip- with only 20m ballast resistors. tion of the device, operation and applications informa- The VIOC tracking function of the LT3045EDD-1 controls tion. The data sheet must be read in conjunction with an upstream switching converter to maintain a constant this demo manual for demonstration circuit 2637A. The voltage across the regulator and hence minimize power LT3045EDD-1 is assembled in a 12-lead (3mm 3mm) dissipation. In the parallel configuration, connect the VIOC plastic DFN package with an exposed pad on the bottom- pin of only one IC to the switching converter, while the side of the IC. Proper board layout is essential for maxi- VIOC pins of the other ICs are left floating. The power mum thermal performance. good feedback (PGFB) pin is used to set a programmable Design files for this circuit board are available at power good threshold, and also activates the fast start-up DEMO MANUAL DC2637A QUICK START PROCEDURE Demonstration circuit 2637A is easy to set up to evaluate 4. Apply 3.8V across V to GND. Draw 2A of load cur- IN the performance of four LT3045EDD-1s in parallel. Refer rent. The output voltage should be 3.29V 3% (3.19V to Figure 1 for proper measurement equipment setup and to 3.39V). follow the procedure below: 5. Vary V from 3.8V to 20V and the load current up IN 1. Connect the load between the VOUT and GND terminals. to 2A. 2. With the power off, connect the input power supply to NOTE: Make sure the power dissipation is below the the VIN and GND terminals. thermal limit. 3. Make sure the shunt of JP1 is at ON option. 6. Refer to Application Notes AN70 and AN159 for mea- suring output noise and PSRR. Figure 1. Test Procedure Setup Drawing for DC2637A UG-1359 Rev A 2