LTM4700 Dual 50A or Single 100A Module Regulator with Digital Power System Management FEATURES DESCRIPTION n Dual 50A or Single 100A Digitally Adjustable Outputs with The LTM 4700 is a dual 50A or single 100A step-down Digital Interface for Control, Compensation and Monitoring Module (power module) DC/DC regulator featuring n Wide Input Voltage: 4.5V to 16V remote configurability and telemetry-monitoring of power n Output Voltage Range: 0.5V to 1.8V management parameters over PMBus an open standard n 2 ~90% Full Load Efficiency from 12V to 1V at 100A IN OUT I C-based digital interface protocol. The LTM4700 is n 0.5% Maximum DC Output Error Over Temperature comprised of fast analog control loops, precision mixed- n 3% Current Readback Accuracy (25C to 125C) signal circuitry, EEPROM, power MOSFETs, inductors and n Integrated Input Current Sense Amplifier supporting components. The LTM4700 product video is 2 n 400kHz PMBus-Compliant I C Serial Interface available on website. n Supports Telemetry Polling Rates Up to 125Hz The LTM4700s 2-wire serial interface allows outputs to n Integrated 16-Bit ADC n be margined, tuned and ramped up and down at program- Constant Frequency Current Mode Control n mable slew rates with sequencing delay times. Input and Parallel and Current Share Multiple Modules n output currents and voltages, output power, temperatures, 15mm 22mm 7.87mm BGA Package uptime and peak values are readable. Custom configura- Readable Data: n Input and Output Voltages, Currents, and Temperatures tion of the EEPROM contents is not required. At start-up, n Running Peak Values, Uptime, Faults and Warnings output voltages, switching frequency, and channel phase n Internal EEPROM and Fault Logging with ECC angle as-signments can be set by pin-strapping resistors. Writable Data and Configurable Parameters: The LTpowerPlay GUI and DC1613 USB-to-PMBus con- n Output Voltage, Voltage Sequencing and Margining verter and demo kits are available. n Digital Soft-Start/Stop Ramp The LTM4700 is offered in a 15mm 22mm 7.87mm n Optimize Analog Loop Compensation BGA package available with SnPb or RoHS compliant n OV/UV/OT, UVLO, Frequency and Phasing terminal finish. All registered trademarks and trademarks are the property of their respective owners. Protected APPLICATIONS by U.S. Patents including 5408150, 5481178, 5705919, 5929620, 6144194, 6177787, 6580258, 7420359, 8163643. Licensed under U.S. Patent 7000125 and other related patents worldwide. n System Optimization, Characterization and Data Min- ing in Prototype, Production and Field Environments Click to view associated Video Design Idea. n Telecom, Datacom, and Storage Systems TYPICAL APPLICATION Efficiency vs Current at 12V Input Dual 50A Module Regulator with Digital Interface 100 for Control and Monitoring* V , OUT0 V ADJUSTABLE IN 95 V V IN0 OUT0 5.75V TO 16V UP TO 50A 22F V + IN1 V OSNS0 220F 8 SV 90 IN LOAD 8 0 RUN V 0 OSNS0 ON/OFF CONTROL RUN V , 85 1 OUT1 LTM4700 ADJUSTABLE V OUT1 UP TO 50A FAULT0 FAULT INTERRUPTS, + 80 V OSNS1 FAULT1 220F POWER SEQUENCING LOAD V 8 1 OSNS1 PWM CLOCK AND 75 SGND 1.5V SYNC OUT TIME-BASE 1.0V SHARE CLK OUT SYNCHRONIZATION 2 SCL 70 I C/SMBus I/F WITH 0 10 20 30 40 50 SDA REGISTER WRITE PMBus COMMAND SET WP ALERT GND LOAD CURRENT (A) PROTECTION TO/FROM IPMI OR OTHER BOARD 4700 TA01a MANAGEMENT CONTROLLER 4700 TA01b *FOR COMPLETE CIRCUIT, SEE FIGURE 46 Rev. B 1 Document Feedback For more information www.analog.com EFFICIENCY (%)LTM4700 TABLE OF CONTENTS Features ..................................................... 1 Serial Interface ......................................................35 Applications ................................................ 1 Communication Protection ................................35 Typical Application ........................................ 1 Device Addressing .................................................35 Description.................................................. 1 Responses to V and I /I Faults ..................36 OUT IN OUT Absolute Maximum Ratings .............................. 4 Output Overvoltage Fault Response ..................36 Order Information .......................................... 4 Output Undervoltage Response .........................37 Pin Configuration .......................................... 4 Peak Output Overcurrent Fault Response ..........37 Electrical Characteristics ................................. 5 Responses to Timing Faults ...................................37 Typical Performance Characteristics .................. 12 Responses to V OV Faults ...................................37 IN Pin Functions .............................................. 15 Responses to OT/UT Faults ....................................37 Simplified Block Diagram ............................... 19 Internal Overtemperature Fault Response .........37 Decoupling Requirements ............................... 19 External Overtemperature and Functional Diagram ...................................... 20 Undertemperature FaultResponse .................38 Test Circuits ............................................... 21 Responses to Input Overcurrent and Output Operation................................................... 22 Undercurrent Faults ...............................................38 Power Module Introduction ...................................22 Responses to External Faults .................................38 Power Module Overview, Major Features ................22 Fault Logging .........................................................38 EEPROM with ECC .................................................23 Bus Timeout Protection .........................................38 Power-Up and Initialization .................................... 24 Similarity Between PMBus, SMBus and 2 Soft-Start ...............................................................25 I C 2-Wire Interface ...............................................39 Time-Based Sequencing ........................................25 PMBus Serial Digital Interface ...............................39 Voltage-Based Sequencing ....................................25 Figures 7 to 24 PMBus Protocols ........................... 41 Shutdown ..............................................................26 PMBus Command Summary ............................ 44 Light-Load Current Operation ................................26 PMBus Commands ................................................44 Switching Frequency and Phase .............................27 Applications Information ................................ 50 PWM Loop Compensation .....................................27 V to V Step-Down Ratios ...............................50 IN OUT Output Voltage Sensing .........................................27 Input Capacitors ....................................................50 INTV and Build-in 5V Bias Converter .................27 Output Capacitors ..................................................50 CC Output Current Sensing and Sub Milliohm Light Load Current Operation .................................50 DCR Current Sensing .............................................28 Switching Frequency and Phase ............................ 51 Input Current Sensing ............................................28 Output Current Limit Programming .......................52 PolyPhase Load Sharing ........................................28 Minimum On-Time Considerations .........................53 External/Internal Temperature Sense .....................29 Variable Delay Time, Soft-Start and RCONFIG (Resistor Configuration) Pins .................29 Output Voltage Ramping ........................................53 Fault Detection and Handling .................................32 Digital Servo Mode ................................................53 Status Registers and ALERT Masking ................33 Soft Off (Sequenced Off) .......................................54 Mapping Faults to FAULT Pins ...........................35 Undervoltage Lockout ............................................55 Power Good Pins ...............................................35 Fault Detection and Handling .................................55 CRC Protection ..................................................35 Open-Drain Pins ....................................................55 Phase-Locked Loop and Frequency Synchronization .....................................................56 Input Current Sense Amplifier ................................57 Rev. B 2 For more information www.analog.com