DEMO MANUAL DC675C LT1568 Fourth Order Active RC Filter IC DESCRIPTION Demonstration circuit DC675C is for the evaluation of For other possible LT1568 configurations, the DC675C filter circuits using an LT 1568. The LT1568 is a dual 2nd has unused pads for 0805 surface mount resistors and order active-RC filter building block with precision 0.75% capacitors preconfigured with PCB traces to allow for the capacitors and low noise op amps with 180MHz GBW following high accuracy LT1568 filter circuits: trimmed to 10% maximum variation. The 10% GBW 1. 4th order lowpass filter variation of the LT1568 op amps allows for minimizing 2. 5th order lowpass filter the higher frequency error by decreasing resistor values. The cutoff or center frequency (f ) range of an LT1568 C 3. 4th order narrow passband bandpass filter is 200kHz to 10MHz (5MHz for a bandpass filter). 4. 4th order wide passband bandpass The low limit of 200kHz was chosen only to minimize resistor noise and DC offsets (using external capacitors 5. 4th order highpass filter the f frequency can be less than 200kHz). C Refer to the LT1568 data sheet for additional information For testing and evaluation, the DC675C assembly is con- about filter circuit configurations. figured as a single 4th order, 500kHz narrow passband Design files for this circuit board are available. bandpass filter. All registered trademarks and trademarks are the property of their respective owners. l PERFORMANCE SUMMARY The denotes specifications which apply over the full operating temperature range, otherwise specifications are at T = 25C A SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS l V Total Supply Voltage 2.7 11 V S I Supply Current V = 3V l 24 35 mA S S V = 5V l 26 36 mA S V = 5V l 28 38 mA S l Output Voltage Swing High V = 3V, R = 1k 2.75 2.85 V S L l (OUTA, OUTA, OUTB, OUTB Pins) V = 5V, R = 1k 4.60 4.80 V S L l V = 5V, R = 400 4.50 4.65 V S L l V = 5V, R = 1k 4.60 4.75 V S L Output Voltage Swing Low V = 3V, R = 1k l 0.05 0.12 V S L (OUTA, OUTA, OUTB, OUTB Pins) V = 5V, R = 1k l 0.07 0.15 V S L V = 5V, R = 400 l 0.20 0.40 V S L V = 5V, R = 1k l 4.7 V S L I Op Amp Input Bias Current l 0.5 2 A B V Common Mode Input Voltage Range V = 3V 1 to 1.9 V CM S (GNDA and GNDB Pins) V = 5V 3.4 to 2.7 V S OA Input Voltage Noise Density f = 100kHz 1.4 nV/Hz OA Input Voltage Noise Density f = 100kHz 1.0 pA/Hz Rev A 1DEMO MANUAL DC675C LT1568 BLOCK DIAGRAM C1 C1 105.7pF 105.7pF SA INVA SB INVB 3 2 14 15 + 4pF STRAY 4pF STRAY V CAPACITANCE CAPACITANCE 5k 4 OUTA 13 OUTB GNDA GNDB 6 11 + + 5k V C2 C2 141.3pF 141.3pF 1 1 5 OUTA 12 OUTB DC675C BD TYPICAL CAPACITOR SPECIFICATIONS: C1, C2 AND C2/C1 RATIO 0.75% SIDE A TO SIDE B CAPACITOR MISMATCH 1% PART TO PART CAPACITOR VARIATION 2% Rev A 2