Product Information

DC906A

DC906A electronic component of Analog Devices

Datasheet
Switch IC Development Tools LTC4306 Demo Board - 4-ch I2C Mux with B

Manufacturer: Analog Devices
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DC906A
Analog Devices

1 : USD 129.9247

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DC906A
Analog Devices

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QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 906A 4-CHANNEL, 2-WIRE BUS MULTIPLEXER WITH CAPACITANCE BUFFERING LTC4306IUFD DESCRIPTION Demonstration circuit 906A features the Programmable timeout circuitry disconnects the LTC 4306IUFD, a 4-channel, 2-wire I2C bus and downstream buses if the bus is stuck low. When acti- SMBus compatible multiplexer having bus buffers vated, rise time accelerators source currents into the that provide capacitive isolation between the up- 2-wire bus pins during rising edges to reduce rise stream bus and downstream buses. Through soft- time. Two general purpose input/output (GPIO) pins ware control, the LTC4306IUFD connects the up- can be configured as inputs, open-drain outputs or stream 2-wire bus to any desired combination of push-pull outputs. Green LEDs D3 and D2 light up downstream buses. Each bus can be pulled up to a when GPIO1 and GPIO2, respectively, are low. Driv- supply voltage ranging from 2.2V to 5.5V, independ- ing the ENABLE pin low restores all device features to ent of the LTC4306IUFD supply voltage. The down- their default states. Three address pins provide 27 stream buses are also provided with ALERT1B distinct addresses. ALERT4B inputs for fault reporting. Design files for this circuit board are available. Call the LTC factory. LTC is a registered trademark of Linear Technology Corporation Table 1. Performance Summary (T = 25C) A PARAMETER CONDITION VALUE V Voltage Operating Range 2.7V 5.5V CC Bus Pull-up Supply Voltage Range (V -V ) 2.2V 5.5V BUS1 BUS4 2-Wire Bus Frequency Range 0 - 400kHz 7.5ms, 15ms, 30ms options Bus Stuck Low Disconnect Times V = 2.7V - 5.5V all times +/-16.7% CC feature can also be disabled Bus Buffer V Offset Voltage R = 10K 100mV (maximum) OL BUS V = 3.3V 5.5mA (typical) CC Rise Time Accelerator Pull-up Current V = 5V 9mA (typical) CC ALERTB and READY Output V Voltages V = 2.7V - 5.5V I = I = 3mA 0.4V (maximum) OL CC ALERTB READY OPERATING PRINCIPLES For operation with the DC906A, connect the host con- buses. Communications between the upstream and trollers SDA and SCL pins to the LTC4306IUFDs downstream components are then established and a SDAIN and SCLIN pins (hereafter referred to as the host controller on any bus can then control the upstream bus), and connect the upstream bus supply LTC4306IUFD. of 2.7V to 5.5V to Vcc (as shown in Figure 1). The Use turrets VBUS1-VBUS4 and jumpers JP1-JP4 to host controller on the upstream side first addresses pull up the downstream buses to supply voltages dif- and configures the LTC4306IUFD to connect the up- ferent than VCC (i.e., to provide level-shifting). For stream bus to one or more of the four downstream 1 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 906A 4-CHANNEL, 2-WIRE BUS MULTIPLEXER WITH CAPACITANCE BUFFERING example, in Figure1, JP1 is set to the right position fore, set jumper JP5 to the left position for normal and a supply voltage is connected between VBUS1 operation, and set it to the right position to disable and ground. Voltages on VBUS1-VBUS4 must range the LTC4306IUFD. between 2.2V and 5.5V. To connect a downstream Slave devices that are capable of fault reporting and buss pull-up supply to VCC, set its jumper to the left that are located on downstream buses 1-4 should position. connect their fault pins to ALERT1B-ALERT4B, re- Additional configurations include enabling and dis- spectively. The LTC4306IUFD passes downstream abling the rise time accelerators on the backplane faults to the upstream host by pulling down on the side and/or the card side, setting the GPIOs to open- ALERTB pin, so this hosts fault input should be con- drain output, push-pull output, or input mode, setting nected to the LTC4306IUFD ALERTB pin. or resetting the GPIOs outputs, disabling the Bus When the upstream bus is connected to one or more Stuck Low disconnect feature or setting the discon- downstream buses, the READY pin voltage is pulled nect time to 7.5ms, 15ms, 30ms. A host controller up to V . When the upstream bus is disconnected CC can also read the internal registers of the from all downstream buses, the READY voltage is low LTC4306IUFD to determine the settings of these fea- (~0.2V). tures as well as fault statuses. All of these features On the DC906A, the boards default setting for jump- are accessed by sending commands on the 2-wire ers JP6, JP7 and JP8 is the center position, which bus. sets the address of the LTC4306IUFD to (1001 010) . 2 The ENABLE pin, when pulled low, resets the To set a different address, configure the jumpers ac- LTC4306IUFD to its registers default state and dis- cording to Table 1 of the data sheet (note: left posi- ables communication to it. Communication can be tion = H, middle position = NC, right position = L de- reestablished when ENABLE is released high. There- fault = NC for all three jumpers). QUICK START PROCEDURE Demonstration circuit 906A is easy to set up to evalu- jumper to the right position, and connect the sup- ate the performance of the LTC4306IUFD. Refer to ply voltage to the appropriate turret on the left side Figure 1 for proper measurement equipment setup of the board. and follow the procedure below: 2. Set jumper J5 in the left position to enable KEY NOTES: a. Do not activate rise time accelerators communication to the LTC4306IUFD. on buses whose pull-up supply voltages are lower 3. Configure jumpers JP6 JP8 to set the desired 2- than VCC. b. Make sure logic low voltages forced on wire bus address for the LTC4306IUFD according all clock and data pins are < 0.4V. c. When activating to Table 1 on page 13 of the datasheet (note: left multiple downstream buses that are powered from position = H, middle position = NC, right position = separate supply voltages, make sure that the L default = NC for all three jumpers). LTC4306IUFDs VCC voltage is less than or equal to 4. Connect a cable from 6-pin header J2 to a board the lowest downstream bus pull-up supply voltage. containing the master device(s). 1. Jumpers JP1-JP4 choose the pull-up supply volt- 5. Connect a 20-pin ribbon cable from J1 to a board ages VBUS1 VBUS4 for downstream buses 1-4. that contains downstream slave devices. Note: the For unused buses and buses pulled up to VCC, set downstream buses can contain masters, but the the jumpers in the left position. To pull up a down- original command to connect must come from a stream bus to a different voltage than VCC, set its 2

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