QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 918 16/14 BIT 40 TO 105 MSPS ADC LTC2207, LTC2207-14, LTC2206, LTC2206-14, LTC2205, LTC2205-14, LTC2204 DESCRIPTION Demonstration circuit 918 supports members of a Several versions of the 918C demo board support- family of 16/14 BIT 130 MSPS ADCs. Each assem- ing the LTC2207 16-Bit and LTC2207-14 14-Bit se- bly features one of the following devices: LTC2207, ries of A/D converters are listed in Table 1. De- LTC2207-14, LTC2206, LTC2206-14, LTC2205, pending on the required resolution, sample rate and LTC2205-14, or LTC2204 high speed, high dynamic input frequency, the DC918 is supplied with the ap- range ADCs. propriate ADC and with an optimized input circuit. The circuitry on the analog inputs is optimized for Other members of this family include the LTC2208 analog input frequencies below 70MHz or from 16-Bit 130Msps ADC with LVDS outputs, as well as 70MHz to 140MHz. For higher input frequencies, the LTC2203 and LTC2202 which are 16-Bit 25Msps contact the factory for support. and 10Msps single-ended clock versions. These 7x7mm QFN devices are supported by Demonstra- Design files for this circuit board are available. tion Circuit 919 (for single-ended clock input). Call the LTC factory. LTC is a trademark of Linear Technology Corporation Table 1. DC918C Variants DC918 VARIANTS ADC PART NUMBER RESOLUTION* MAXIMUM SAMPLE RATE INPUT FREQUENCY 918C-A LTC2207 16-Bit 105Msps 1MHz - 70MHz 918C-B LTC2207 16-Bit 105Msps 70MHz -140MHz 918C-C LTC2206 16-Bit 80Msps 1MHz - 70MHz 918C-D LTC2206 16-Bit 80Msps 70MHz -140MHz 918C-E LTC2205 16-Bit 65Msps 1MHz - 70MHz 918C-F LTC2205 16-Bit 65Msps 70MHz -140MHz 918C-G LTC2204 16-Bit 40Msps 1MHz - 70MHz 918C-H LTC2207-14 14-Bit 105Msps 1MHz - 70MHz 918C-I LTC2207-14 14-Bit 105Msps 70MHz -140MHz 918C-J LTC2206-14 14-Bit 80Msps 1MHz - 70MHz 918C-K LTC2206-14 14-Bit 80Msps 70MHz -140MHz 918C-L LTC2205-14 14-Bit 65Msps 1MHz - 70MHz 1 QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 918 16/14 BIT 40 TO 105 MSPS ADC Table 2. Performance Summary (T = 25C) A PARAMETER CONDITION VALUE Optimized for 3.3V Depending on sampling rate and the A/D converter provided, Supply Voltage this supply must provide up to 500mA. 3.15V 3.45V min/max Analog input range Depending on PGA Pin Voltage 1.5V to 2.25V PP PP Minimum Logic High 2.4V Logic Input Voltages Maximum Logic Low 0.8V Logic Output Voltage Minimum Logic High -1.6mA 2.3V (33W Series terminations) (74VCX245 output buffer, V = 2.5V) Maximum Logic Low 1.6mA 0.7V (33W Series terminations) cc Sampling Frequency (Convert Clock Frequency) See Table 1 Convert Clock Level 50 W Source Impedance, AC coupled or ground referenced 2V 2.5V Sine Wave P-P P-P (Convert Clock input is capacitor coupled on board and ter- or Square wave minated with 50W.) Resolution See Table 1 Input frequency range See Table 1 SFDR See Applicable Data Sheet SNR See Applicable Data Sheet QUICK START PROCEDURE Demonstration circuit 918 is easy to set up to evalu- LTC2204 A/D converters. Refer to Figure 1 for proper ate the performance of the LTC2207/LTC2207-14, measurement equipment setup and follow the proce- LTC2206/LTC2206-14, LTC2205/LTC2205-14, dure below: SETUP If a DC718 QuickDAACS Data Analysis and Collection the required software and for connecting the DC718 to System was supplied with the DC918 demonstration the DC918 and to a PC running Windows98, 2000 or circuit, follow the DC718 Quick Start Guide to install XP. 2