DEMO MANUAL DC919A LTC2207, LTC2206, LTC2205, LTC2204, LTC2203, LTC2202, LTC2201 16-Bit/14-Bit 10Msps to 105Msps ADCs DESCRIPTION Demonstration circuit 919A supports members of a family LTC2202 A/D converters, are listed in Table 1. LTC2204, of 16-bit/14-bit 10Msps to 105Msps ADCs. Each assembly LTC2205, LTC2206 and LTC2207 have differential clock features one of the following devices: LTC 2207, LTC2206, inputs but use a single-ended clock input for evaluation LTC2205, LTC2204, LTC2203, LTC2202, or LTC2201 high with the DC input on the DC919A board. Depending on the speed, high dynamic range ADCs. required sample rate and input frequency, the DC919A is supplied with the appropriate ADC and with an optimized Other members of this family include the LTC2208/ input circuit. The circuitry on the analog inputs is optimized LTC2208-14 16-bit/14-bit 130Msps ADC with LVDS out- for analog input frequencies from DC to 70MHz or from puts. These 9mm 9mm QFN devices are supported by 1MHz to 70MHz if using the transformer coupled input. For Demonstration circuit 854 (CMOS outputs) or by Dem- higher input frequencies, contact the factory for support. onstration circuit 996 (LVDS outputs). Design files for this circuit board are available at Several versions of the 919A demo board supporting a DEMO MANUAL DC919A PERFORMANCE SUMMARY (T = 25C) A Convert Clock Level 50 Source Impedance, AC-Coupled or Ground Referenced (Convert 2V 2.5V Sine Wave or P-P P-P Clock Input Is Capacitor Coupled on Board and Terminated with 50.) Square Wave Resolution See Table 1 Input Frequency Range See Table 1 SFDR See Applicable Data Sheet SNR See Applicable Data Sheet QUICK START PROCEDURE Demonstration circuit 919A is easy to set up to evaluate The DC718 data collection board is powered by the USB the performance of the LTC2207, LTC2206, LTC2205, cable and does not require an external power supply unless LTC2204, LTC2203, or LTC2202 A/D converters. Refer to it must be connected to the PC through an unpowered hub Figure 1 for proper measurement equipment setup and in which case it must be supplied an external 6V to 9V on follow this procedure: turrets G7(+) and G1() or the adjacent 2.1mm power jack. Setup Encode Clock If a DC718 QuikEval II Data Analysis and Collection NOTE: This is a logic compatible input, contrary to the System was supplied with the DC919A demonstration majority of Linear Technology ADC demo boards. It is not circuit, follow the DC718 Quick Start Guide to install the terminated with 50. required software and for connecting the DC718 to the Apply an encode clock to the SMA connector on the DC919A DC919A to a PC. demonstration circuit board marked J3 ENCODE INPUT. DC919A Demonstration Circuit Board Jumpers For the best noise performance, the ENCODE INPUT must be driven with a very low jitter source. A low jitter The DC919A demonstration circuit board should have 3.3V oscillator with direct connection through a barrel is the following jumper settings as default: (as per Figure 1) recommended. JP1: Output clock polarity: GND If using a sinusoidal generator, the amplitude should be JP2: SENSE: VDD, (Internal reference) as large as possible, up to 3V or 13dBm, filtered and P-P terminated with a 50 thru-terminator. If a generator JP3: PGA: GND 2.25V range with 50 output impedance is connected via a cable, it JP4: RAND: GND Not randomized is recommended that a thru-terminator be used. However, below 15MHz, it is recommended that a square wave JP5: SHDN: GND Not shutdown drive be used. JP6: DITH: GND No internal dithering If a sinusoidal ground referenced signal, or an AC-coupled Applying Power and Signals to the DC919A signal is used, 1.5V to 1.7V DC bias must be introduced Demonstration Circuit via a bias tee. If a DC718 is used to acquire data from the DC919A, the DC919A has provision for a popular surface mount oscil- DC718 must FIRST be connected to a powered USB port lator form and some population options to select this as or provided an external 6V to 9V BEFORE applying 3.3V the clock source. (Please see schematic.) across the pins marked +3.3V and PWR GND on the If only sinusoidal or clipped sinusoid signal sources are DC919A. The DC919A demonstration circuit requires up available as the clock source for scenarios involving sam- to 500mA depending on the sampling rate and the A/D pling rates less than 15Msps to 20Msps, it is recommended converter supplied. dc919af 2