DC996B-F Analog Devices

DEMO MANUAL DC996 LTC2208/LTC2208-14/LTC2217/ LTC2216/LTC2215 16-Bit/14-Bit 80Msps to130Msps ADCs DESCRIPTION Demonstration circuit 996 supports a family of 16-/14-bit Several versions of the 996 demo board supporting the 80Msps to 130Msps ADCs. Each assembly features one of LTC2208 16-bit, LTC2217 16-bit and LTC2208-14 14-bit the following devices: LTC 2208, LTC2208-14, LTC2217, series of A/D converters are listed in Table 1. Depending on LTC2216, LTC2215 high speed, high dynamic range ADCs. the required resolution, sample rate and input frequency, the DC996 is supplied with the appropriate ADC and with This demonstration circuit only supports LVDS operation. an optimized input circuit. The circuitry on the analog inputs For demonstration of CMOS output signaling, please see is optimized for analog input frequencies below 70MHz DC854. or from 70MHz to 140MHz. For higher input frequencies, Other members of this family include the LTC2207, a contact the factory for support. 105Msps 16-bit CMOS-only version of this device, as Design files for this circuit board are available at well as lower speed versions and single-ended clock ver- DEMO MANUAL DC996 PERFORMANCE SUMMARY (T = 25C) A PARAMETER CONDITION VALUE Supply Voltage Depending On Sampling Rate and the A/D Converter Provided, Optimized for 3.3V This Supply Must Provide Up To 700mA. 3.15V3.45V Min/Max Analog Input Range Depending on PGA Pin Voltage 1.5V to 2.25V P-P P-P Logic Input Voltages Minimum Logic High 2V Maximum Logic Low 0.8V Logic Output Voltages (Differential) Nominal Logic Levels (100 Load) 350mV/2.1V Common Mode Minimum Logic levels (100 Load) 247mV/2.1V Common Mode Sampling Frequency (Convert Clock Frequency) See Table 1 Convert Clock Level 50 Source Impedance, AC-Coupled or Ground Referenced 2V 2.5V Sine Wave or P-P P-P (Convert Clock Input Is Capacitor Coupled On Board and Square wave Terminated with 50.) Resolution See Table 1 Input frequency range See Table 1 SFDR See Applicable Data Sheet SNR See Applicable Data Sheet QUICK START PROCEDURE Demonstration circuit 996 is easy to set up to evaluate Applying Power and Signals to the DC996 the performance of the LTC2208/LTC2208-14/LTC2217 Demonstration Circuit A/D converters. Refer to Figure 1 for proper measurement Apply 3.3V across the pins marked +3.3V and PWR equipment setup and follow this procedure: GND on the DC996. The DC996 demonstration circuit requires up to 700mA depending on the sampling rate and Setup the A/D converter supplied. If a DC890 is used to acquire If a DC890 QuikEval II Data Acquisition and Collection data from the DC996, the DC890 must be provided with System was supplied with the DC996 demonstration an external 6V 0.5V 1A supply on turrets G7(+) and circuit, follow the DC890 Quick Start Guide to install the G1() or the adjacent 2.1mm power jack to support the required software and for connecting the DC890 to the power requirements of the Xilinx Spartan 3 FPGA active DC996 and to a PC. terminations used to terminate the LVDS repeaters on the DC996. The DC890 will not activate the LVDS mode unless DC996 Demonstration Circuit Board Jumpers the DC890 detects external power present. The DC996 demonstration circuit board should have the If external power is not present the DC890 will not config- following jumper settings as default: (as per Figure 1). ure the FPGA for LVDS terminations as this would result in exceeding the USB 500mA limit. The DC890 contains Figure 1 shows DC996A, the DC996B is shown in Figure 7. an onboard electronic circuit breaker which will shut off J2: Mode (V ) 2 s Complement CDS Off CC the DC890 if external power is removed while the FPGA J3: SHDN: (Run) Dither (Off) is configured for LVDS active terminations. J4: Rand (Off) PGA 1x J9: Unused power connector dc996f 2